Path: blob/master/arch/csky/abiv2/inc/abi/pgtable-bits.h
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/* SPDX-License-Identifier: GPL-2.0 */12#ifndef __ASM_CSKY_PGTABLE_BITS_H3#define __ASM_CSKY_PGTABLE_BITS_H45/* implemented in software */6#define _PAGE_ACCESSED (1<<7)7#define _PAGE_READ (1<<8)8#define _PAGE_WRITE (1<<9)9#define _PAGE_PRESENT (1<<10)10#define _PAGE_MODIFIED (1<<11)1112/* We borrow bit 7 to store the exclusive marker in swap PTEs. */13#define _PAGE_SWP_EXCLUSIVE (1<<7)1415/* implemented in hardware */16#define _PAGE_GLOBAL (1<<0)17#define _PAGE_VALID (1<<1)18#define _PAGE_DIRTY (1<<2)1920#define _PAGE_SO (1<<5)21#define _PAGE_BUF (1<<6)22#define _PAGE_CACHE (1<<3)23#define _CACHE_MASK _PAGE_CACHE2425#define _CACHE_CACHED (_PAGE_CACHE | _PAGE_BUF)26#define _CACHE_UNCACHED (0)2728#define _PAGE_PROT_NONE _PAGE_WRITE2930/*31* Encode/decode swap entries and swap PTEs. Swap PTEs are all PTEs that32* are !pte_none() && !pte_present().33*34* Format of swap PTE:35* bit 0: _PAGE_GLOBAL (zero)36* bit 1: _PAGE_VALID (zero)37* bit 2 - 6: swap type38* bit 7: exclusive marker39* bit 8: swap offset[0]40* bit 9: _PAGE_WRITE (zero)41* bit 10: _PAGE_PRESENT (zero)42* bit 11 - 31: swap offset[1 - 21]43*/44#define __swp_type(x) (((x).val >> 2) & 0x1f)45#define __swp_offset(x) ((((x).val >> 8) & 0x1) | \46(((x).val >> 10) & 0x3ffffe))47#define __swp_entry(type, offset) ((swp_entry_t) { \48((type & 0x1f) << 2) | \49((offset & 0x1) << 8) | \50((offset & 0x3ffffe) << 10)})5152#endif /* __ASM_CSKY_PGTABLE_BITS_H */535455