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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/arch/loongarch/include/asm/cacheops.h
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/* SPDX-License-Identifier: GPL-2.0 */

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/*

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 * Cache operations for the cache instruction.

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 *

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 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited

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 */

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#ifndef __ASM_CACHEOPS_H

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#define __ASM_CACHEOPS_H

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/*

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 * Most cache ops are split into a 3 bit field identifying the cache, and a 2

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 * bit field identifying the cache operation.

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 */

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#define CacheOp_Cache			0x07

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#define CacheOp_Op			0x18

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#define Cache_LEAF0			0x00

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#define Cache_LEAF1			0x01

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#define Cache_LEAF2			0x02

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#define Cache_LEAF3			0x03

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#define Cache_LEAF4			0x04

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#define Cache_LEAF5			0x05

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#define Index_Invalidate		0x08

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#define Index_Writeback_Inv		0x08

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#define Hit_Invalidate			0x10

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#define Hit_Writeback_Inv		0x10

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#define CacheOp_User_Defined		0x18

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#define Index_Writeback_Inv_LEAF0	(Cache_LEAF0 | Index_Writeback_Inv)

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#define Index_Writeback_Inv_LEAF1	(Cache_LEAF1 | Index_Writeback_Inv)

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#define Index_Writeback_Inv_LEAF2	(Cache_LEAF2 | Index_Writeback_Inv)

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#define Index_Writeback_Inv_LEAF3	(Cache_LEAF3 | Index_Writeback_Inv)

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#define Index_Writeback_Inv_LEAF4	(Cache_LEAF4 | Index_Writeback_Inv)

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#define Index_Writeback_Inv_LEAF5	(Cache_LEAF5 | Index_Writeback_Inv)

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#define Hit_Writeback_Inv_LEAF0		(Cache_LEAF0 | Hit_Writeback_Inv)

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#define Hit_Writeback_Inv_LEAF1		(Cache_LEAF1 | Hit_Writeback_Inv)

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#define Hit_Writeback_Inv_LEAF2		(Cache_LEAF2 | Hit_Writeback_Inv)

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#define Hit_Writeback_Inv_LEAF3		(Cache_LEAF3 | Hit_Writeback_Inv)

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#define Hit_Writeback_Inv_LEAF4		(Cache_LEAF4 | Hit_Writeback_Inv)

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#define Hit_Writeback_Inv_LEAF5		(Cache_LEAF5 | Hit_Writeback_Inv)

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#endif	/* __ASM_CACHEOPS_H */

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