// SPDX-License-Identifier: GPL-2.01/***************************************************************************/23/*4* m5272.c -- platform support for ColdFire 5272 based boards5*6* Copyright (C) 1999-2002, Greg Ungerer ([email protected])7* Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)8*/910/***************************************************************************/1112#include <linux/clkdev.h>13#include <linux/kernel.h>14#include <linux/param.h>15#include <linux/init.h>16#include <linux/io.h>17#include <linux/phy.h>18#include <linux/phy_fixed.h>19#include <asm/machdep.h>20#include <asm/coldfire.h>21#include <asm/mcfsim.h>22#include <asm/mcfuart.h>23#include <asm/mcfclk.h>2425/***************************************************************************/2627/*28* Some platforms need software versions of the GPIO data registers.29*/30unsigned short ppdata;31unsigned char ledbank = 0xff;3233/***************************************************************************/3435DEFINE_CLK(pll, "pll.0", MCF_CLK);36DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);3738static struct clk_lookup m5272_clk_lookup[] = {39CLKDEV_INIT(NULL, "pll.0", &clk_pll),40CLKDEV_INIT(NULL, "sys.0", &clk_sys),41CLKDEV_INIT("mcftmr.0", NULL, &clk_sys),42CLKDEV_INIT("mcftmr.1", NULL, &clk_sys),43CLKDEV_INIT("mcftmr.2", NULL, &clk_sys),44CLKDEV_INIT("mcftmr.3", NULL, &clk_sys),45CLKDEV_INIT("mcfuart.0", NULL, &clk_sys),46CLKDEV_INIT("mcfuart.1", NULL, &clk_sys),47CLKDEV_INIT("mcfqspi.0", NULL, &clk_sys),48CLKDEV_INIT("fec.0", NULL, &clk_sys),49};5051/***************************************************************************/5253static void __init m5272_uarts_init(void)54{55u32 v;5657/* Enable the output lines for the serial ports */58v = readl(MCFSIM_PBCNT);59v = (v & ~0x000000ff) | 0x00000055;60writel(v, MCFSIM_PBCNT);6162v = readl(MCFSIM_PDCNT);63v = (v & ~0x000003fc) | 0x000002a8;64writel(v, MCFSIM_PDCNT);65}6667/***************************************************************************/6869static void m5272_cpu_reset(void)70{71local_irq_disable();72/* Set watchdog to reset, and enabled */73__raw_writew(0, MCFSIM_WIRR);74__raw_writew(1, MCFSIM_WRRR);75__raw_writew(0, MCFSIM_WCR);76for (;;)77/* wait for watchdog to timeout */;78}7980/***************************************************************************/8182void __init config_BSP(char *commandp, int size)83{84#if defined (CONFIG_MOD5272)85/* Set base of device vectors to be 64 */86writeb(0x40, MCFSIM_PIVR);87#endif8889#if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)90/* Copy command line from FLASH to local buffer... */91memcpy(commandp, (char *) 0xf0004000, size);92commandp[size-1] = 0;93#elif defined(CONFIG_CANCam)94/* Copy command line from FLASH to local buffer... */95memcpy(commandp, (char *) 0xf0010000, size);96commandp[size-1] = 0;97#endif9899mach_reset = m5272_cpu_reset;100mach_sched_init = hw_timer_init;101}102103/***************************************************************************/104105/*106* Some 5272 based boards have the FEC ethernet directly connected to107* an ethernet switch. In this case we need to use the fixed phy type,108* and we need to declare it early in boot.109*/110static struct fixed_phy_status nettel_fixed_phy_status __initdata = {111.link = 1,112.speed = 100,113.duplex = 0,114};115116/***************************************************************************/117118static int __init init_BSP(void)119{120m5272_uarts_init();121fixed_phy_add(0, &nettel_fixed_phy_status);122clkdev_add_table(m5272_clk_lookup, ARRAY_SIZE(m5272_clk_lookup));123return 0;124}125126arch_initcall(init_BSP);127128/***************************************************************************/129130131