/* libgcc1 routines for 68000 w/o floating-point hardware.1Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.23This file is part of GNU CC.45GNU CC is free software; you can redistribute it and/or modify it6under the terms of the GNU General Public License as published by the7Free Software Foundation; either version 2, or (at your option) any8later version.910In addition to the permissions in the GNU General Public License, the11Free Software Foundation gives you unlimited permission to link the12compiled version of this file with other programs, and to distribute13those programs without any restriction coming from the use of this14file. (The General Public License restrictions do apply in other15respects; for example, they cover modification of the file, and16distribution when not linked into another program.)1718This file is distributed in the hope that it will be useful, but19WITHOUT ANY WARRANTY; without even the implied warranty of20MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU21General Public License for more details. */2223/* As a special exception, if you link this library with files24compiled with GCC to produce an executable, this does not cause25the resulting executable to be covered by the GNU General Public License.26This exception does not however invalidate any other reasons why27the executable file might be covered by the GNU General Public License. */2829/* Use this one for any 680x0; assumes no floating point hardware.30The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.31Some of this code comes from MINIX, via the folks at ericsson.32D. V. Henkel-Wallace ([email protected]) Fete Bastille, 199233*/34#include <linux/export.h>35/* These are predefined by new versions of GNU cpp. */3637#ifndef __USER_LABEL_PREFIX__38#define __USER_LABEL_PREFIX__ _39#endif4041#ifndef __REGISTER_PREFIX__42#define __REGISTER_PREFIX__43#endif4445#ifndef __IMMEDIATE_PREFIX__46#define __IMMEDIATE_PREFIX__ #47#endif4849/* ANSI concatenation macros. */5051#define CONCAT1(a, b) CONCAT2(a, b)52#define CONCAT2(a, b) a ## b5354/* Use the right prefix for global labels. */5556#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)5758/* Use the right prefix for registers. */5960#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)6162/* Use the right prefix for immediate values. */6364#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)6566#define d0 REG (d0)67#define d1 REG (d1)68#define d2 REG (d2)69#define d3 REG (d3)70#define d4 REG (d4)71#define d5 REG (d5)72#define d6 REG (d6)73#define d7 REG (d7)74#define a0 REG (a0)75#define a1 REG (a1)76#define a2 REG (a2)77#define a3 REG (a3)78#define a4 REG (a4)79#define a5 REG (a5)80#define a6 REG (a6)81#define fp REG (fp)82#define sp REG (sp)8384.text85.proc86.globl SYM (__udivsi3)87SYM (__udivsi3):88#if !(defined(__mcf5200__) || defined(__mcoldfire__))89movel d2, sp@-90movel sp@(12), d1 /* d1 = divisor */91movel sp@(8), d0 /* d0 = dividend */9293cmpl IMM (0x10000), d1 /* divisor >= 2 ^ 16 ? */94jcc L3 /* then try next algorithm */95movel d0, d296clrw d297swap d298divu d1, d2 /* high quotient in lower word */99movew d2, d0 /* save high quotient */100swap d0101movew sp@(10), d2 /* get low dividend + high rest */102divu d1, d2 /* low quotient */103movew d2, d0104jra L6105106L3: movel d1, d2 /* use d2 as divisor backup */107L4: lsrl IMM (1), d1 /* shift divisor */108lsrl IMM (1), d0 /* shift dividend */109cmpl IMM (0x10000), d1 /* still divisor >= 2 ^ 16 ? */110jcc L4111divu d1, d0 /* now we have 16 bit divisor */112andl IMM (0xffff), d0 /* mask out divisor, ignore remainder */113114/* Multiply the 16 bit tentative quotient with the 32 bit divisor. Because of115the operand ranges, this might give a 33 bit product. If this product is116greater than the dividend, the tentative quotient was too large. */117movel d2, d1118mulu d0, d1 /* low part, 32 bits */119swap d2120mulu d0, d2 /* high part, at most 17 bits */121swap d2 /* align high part with low part */122tstw d2 /* high part 17 bits? */123jne L5 /* if 17 bits, quotient was too large */124addl d2, d1 /* add parts */125jcs L5 /* if sum is 33 bits, quotient was too large */126cmpl sp@(8), d1 /* compare the sum with the dividend */127jls L6 /* if sum > dividend, quotient was too large */128L5: subql IMM (1), d0 /* adjust quotient */129130L6: movel sp@+, d2131rts132133#else /* __mcf5200__ || __mcoldfire__ */134135/* Coldfire implementation of non-restoring division algorithm from136Hennessy & Patterson, Appendix A. */137link a6,IMM (-12)138moveml d2-d4,sp@139movel a6@(8),d0140movel a6@(12),d1141clrl d2 | clear p142moveq IMM (31),d4143L1: addl d0,d0 | shift reg pair (p,a) one bit left144addxl d2,d2145movl d2,d3 | subtract b from p, store in tmp.146subl d1,d3147jcs L2 | if no carry,148bset IMM (0),d0 | set the low order bit of a to 1,149movl d3,d2 | and store tmp in p.150L2: subql IMM (1),d4151jcc L1152moveml sp@,d2-d4 | restore data registers153unlk a6 | and return154rts155#endif /* __mcf5200__ || __mcoldfire__ */156EXPORT_SYMBOL(__udivsi3)157158159