Path: blob/master/arch/microblaze/include/asm/cpuinfo.h
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/* SPDX-License-Identifier: GPL-2.0 */1/*2* Generic support for queying CPU info3*4* Copyright (C) 2007-2009 Michal Simek <[email protected]>5* Copyright (C) 2007-2009 PetaLogix6* Copyright (C) 2007 John Williams <[email protected]>7*/89#ifndef _ASM_MICROBLAZE_CPUINFO_H10#define _ASM_MICROBLAZE_CPUINFO_H1112#include <linux/of.h>1314/* CPU Version and FPGA Family code conversion table type */15struct cpu_ver_key {16const char *s;17const unsigned k;18};1920extern const struct cpu_ver_key cpu_ver_lookup[];2122struct family_string_key {23const char *s;24const unsigned k;25};2627extern const struct family_string_key family_string_lookup[];2829struct cpuinfo {30/* Core CPU configuration */31u32 use_instr;32u32 use_mult;33u32 use_fpu;34u32 use_exc;35u32 ver_code;36u32 mmu;37u32 mmu_privins;38u32 endian;3940/* CPU caches */41u32 use_icache;42u32 icache_tagbits;43u32 icache_write;44u32 icache_line_length;45u32 icache_size;46unsigned long icache_base;47unsigned long icache_high;4849u32 use_dcache;50u32 dcache_tagbits;51u32 dcache_write;52u32 dcache_line_length;53u32 dcache_size;54u32 dcache_wb;55unsigned long dcache_base;56unsigned long dcache_high;5758/* Bus connections */59u32 use_dopb;60u32 use_iopb;61u32 use_dlmb;62u32 use_ilmb;63u32 num_fsl;6465/* CPU interrupt line info */66u32 irq_edge;67u32 irq_positive;6869u32 area_optimised;7071/* HW debug support */72u32 hw_debug;73u32 num_pc_brk;74u32 num_rd_brk;75u32 num_wr_brk;76u32 cpu_clock_freq; /* store real freq of cpu */7778/* FPGA family */79u32 fpga_family_code;8081/* User define */82u32 pvr_user1;83u32 pvr_user2;84};8586extern struct cpuinfo cpuinfo;8788/* fwd declarations of the various CPUinfo populators */89void setup_cpuinfo(void);90void setup_cpuinfo_clk(void);9192void set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu);93void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);9495static inline unsigned int fcpu(struct device_node *cpu, char *n)96{97u32 val = 0;9899of_property_read_u32(cpu, n, &val);100101return val;102}103104#endif /* _ASM_MICROBLAZE_CPUINFO_H */105106107