Path: blob/master/arch/microblaze/include/asm/tlbflush.h
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/* SPDX-License-Identifier: GPL-2.0 */1/*2* Copyright (C) 2008-2009 Michal Simek <[email protected]>3* Copyright (C) 2008-2009 PetaLogix4* Copyright (C) 2006 Atmark Techno, Inc.5*/67#ifndef _ASM_MICROBLAZE_TLBFLUSH_H8#define _ASM_MICROBLAZE_TLBFLUSH_H910#include <linux/sched.h>11#include <linux/threads.h>12#include <asm/processor.h> /* For TASK_SIZE */13#include <asm/mmu.h>14#include <asm/page.h>1516extern void _tlbie(unsigned long address);17extern void _tlbia(void);1819#define __tlbia() { preempt_disable(); _tlbia(); preempt_enable(); }20#define __tlbie(x) { _tlbie(x); }2122static inline void local_flush_tlb_all(void)23{ __tlbia(); }24static inline void local_flush_tlb_mm(struct mm_struct *mm)25{ __tlbia(); }26static inline void local_flush_tlb_page(struct vm_area_struct *vma,27unsigned long vmaddr)28{ __tlbie(vmaddr); }29static inline void local_flush_tlb_range(struct vm_area_struct *vma,30unsigned long start, unsigned long end)31{ __tlbia(); }3233#define flush_tlb_kernel_range(start, end) do { } while (0)3435#define update_mmu_cache_range(vmf, vma, addr, ptep, nr) do { } while (0)36#define update_mmu_cache(vma, addr, pte) \37update_mmu_cache_range(NULL, vma, addr, ptep, 1)3839#define flush_tlb_all local_flush_tlb_all40#define flush_tlb_mm local_flush_tlb_mm41#define flush_tlb_page local_flush_tlb_page42#define flush_tlb_range local_flush_tlb_range4344/*45* This is called in munmap when we have freed up some page-table46* pages. We don't need to do anything here, there's nothing special47* about our page-table pages. -- paulus48*/49static inline void flush_tlb_pgtables(struct mm_struct *mm,50unsigned long start, unsigned long end) { }5152#endif /* _ASM_MICROBLAZE_TLBFLUSH_H */535455