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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/arch/microblaze/kernel/setup.c
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/*
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* Copyright (C) 2007-2009 Michal Simek <[email protected]>
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* Copyright (C) 2007-2009 PetaLogix
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* Copyright (C) 2006 Atmark Techno, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/of_clk.h>
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#include <linux/clocksource.h>
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#include <linux/string.h>
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#include <linux/seq_file.h>
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#include <linux/cpu.h>
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#include <linux/initrd.h>
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#include <linux/console.h>
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#include <linux/debugfs.h>
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#include <linux/of_fdt.h>
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#include <linux/pgtable.h>
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#include <asm/setup.h>
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#include <asm/sections.h>
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#include <asm/page.h>
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#include <linux/io.h>
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#include <linux/bug.h>
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#include <linux/param.h>
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#include <linux/pci.h>
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#include <linux/cache.h>
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#include <linux/of.h>
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#include <linux/dma-mapping.h>
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#include <asm/cacheflush.h>
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#include <asm/entry.h>
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#include <asm/cpuinfo.h>
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DEFINE_PER_CPU(unsigned int, KSP); /* Saved kernel stack pointer */
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DEFINE_PER_CPU(unsigned int, KM); /* Kernel/user mode */
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DEFINE_PER_CPU(unsigned int, ENTRY_SP); /* Saved SP on kernel entry */
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DEFINE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */
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DEFINE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */
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/*
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* Placed cmd_line to .data section because can be initialized from
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* ASM code. Default position is BSS section which is cleared
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* in machine_early_init().
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*/
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char cmd_line[COMMAND_LINE_SIZE] __section(".data");
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void __init setup_arch(char **cmdline_p)
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{
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*cmdline_p = boot_command_line;
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setup_memory();
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console_verbose();
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unflatten_device_tree();
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setup_cpuinfo();
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microblaze_cache_init();
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xilinx_pci_init();
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}
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#ifdef CONFIG_MTD_UCLINUX
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/* Handle both romfs and cramfs types, without generating unnecessary
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code (ie no point checking for CRAMFS if it's not even enabled) */
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inline unsigned get_romfs_len(unsigned *addr)
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{
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#ifdef CONFIG_ROMFS_FS
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if (memcmp(&addr[0], "-rom1fs-", 8) == 0) /* romfs */
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return be32_to_cpu(addr[2]);
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#endif
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#ifdef CONFIG_CRAMFS
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if (addr[0] == le32_to_cpu(0x28cd3d45)) /* cramfs */
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return le32_to_cpu(addr[1]);
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#endif
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return 0;
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}
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#endif /* CONFIG_MTD_UCLINUX_EBSS */
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unsigned long kernel_tlb;
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void __init machine_early_init(const char *cmdline, unsigned int ram,
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unsigned int fdt, unsigned int msr, unsigned int tlb0,
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unsigned int tlb1)
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{
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unsigned long *src, *dst;
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unsigned int offset = 0;
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/* If CONFIG_MTD_UCLINUX is defined, assume ROMFS is at the
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* end of kernel. There are two position which we want to check.
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* The first is __init_end and the second __bss_start.
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*/
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#ifdef CONFIG_MTD_UCLINUX
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int romfs_size;
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unsigned int romfs_base;
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char *old_klimit = klimit;
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romfs_base = (ram ? ram : (unsigned int)&__init_end);
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romfs_size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base));
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if (!romfs_size) {
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romfs_base = (unsigned int)&__bss_start;
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romfs_size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base));
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}
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/* Move ROMFS out of BSS before clearing it */
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if (romfs_size > 0) {
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memmove(&__bss_stop, (int *)romfs_base, romfs_size);
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klimit += romfs_size;
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}
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#endif
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/* clearing bss section */
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memset(__bss_start, 0, __bss_stop-__bss_start);
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memset(_ssbss, 0, _esbss-_ssbss);
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/* initialize device tree for usage in early_printk */
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early_init_devtree(_fdt_start);
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/* setup kernel_tlb after BSS cleaning
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* Maybe worth to move to asm code */
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kernel_tlb = tlb0 + tlb1;
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/* printk("TLB1 0x%08x, TLB0 0x%08x, tlb 0x%x\n", tlb0,
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tlb1, kernel_tlb); */
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pr_info("Ramdisk addr 0x%08x, ", ram);
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if (fdt)
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pr_info("FDT at 0x%08x\n", fdt);
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else
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pr_info("Compiled-in FDT at %p\n", _fdt_start);
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#ifdef CONFIG_MTD_UCLINUX
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pr_info("Found romfs @ 0x%08x (0x%08x)\n",
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romfs_base, romfs_size);
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pr_info("#### klimit %p ####\n", old_klimit);
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BUG_ON(romfs_size < 0); /* What else can we do? */
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pr_info("Moved 0x%08x bytes from 0x%08x to 0x%08x\n",
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romfs_size, romfs_base, (unsigned)&__bss_stop);
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pr_info("New klimit: 0x%08x\n", (unsigned)klimit);
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#endif
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#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
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if (msr) {
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pr_info("!!!Your kernel has setup MSR instruction but ");
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pr_cont("CPU don't have it %x\n", msr);
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}
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#else
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if (!msr) {
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pr_info("!!!Your kernel not setup MSR instruction but ");
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pr_cont("CPU have it %x\n", msr);
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}
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#endif
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/* Do not copy reset vectors. offset = 0x2 means skip the first
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* two instructions. dst is pointer to MB vectors which are placed
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* in block ram. If you want to copy reset vector setup offset to 0x0 */
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#if !CONFIG_MANUAL_RESET_VECTOR
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offset = 0x2;
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#endif
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dst = (unsigned long *) (offset * sizeof(u32));
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for (src = __ivt_start + offset; src < __ivt_end; src++, dst++)
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*dst = *src;
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/* Initialize global data */
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per_cpu(KM, 0) = 0x1; /* We start in kernel mode */
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per_cpu(CURRENT_SAVE, 0) = (unsigned long)current;
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}
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void __init time_init(void)
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{
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of_clk_init(NULL);
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setup_cpuinfo_clk();
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timer_probe();
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}
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#ifdef CONFIG_DEBUG_FS
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struct dentry *of_debugfs_root;
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static int microblaze_debugfs_init(void)
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{
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of_debugfs_root = debugfs_create_dir("microblaze", NULL);
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return 0;
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}
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arch_initcall(microblaze_debugfs_init);
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static int __init debugfs_tlb(void)
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{
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debugfs_create_u32("tlb_skip", S_IRUGO, of_debugfs_root, &tlb_skip);
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return 0;
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}
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device_initcall(debugfs_tlb);
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#endif
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