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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/arch/mips/cavium-octeon/octeon_boot.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */

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/*

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 * (C) Copyright 2004, 2005 Cavium Networks

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 */

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#ifndef __OCTEON_BOOT_H__

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#define __OCTEON_BOOT_H__

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#include <linux/types.h>

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struct boot_init_vector {

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	/* First stage address - in ram instead of flash */

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	uint64_t code_addr;

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	/* Setup code for application, NOT application entry point */

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	uint32_t app_start_func_addr;

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	/* k0 is used for global data - needs to be passed to other cores */

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	uint32_t k0_val;

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	/* Address of boot info block structure */

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	uint64_t boot_info_addr;

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	uint32_t flags;		/* flags */

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	uint32_t pad;

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};

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/* similar to bootloader's linux_app_boot_info but without global data */

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struct linux_app_boot_info {

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#ifdef __BIG_ENDIAN_BITFIELD

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	uint32_t labi_signature;

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	uint32_t start_core0_addr;

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	uint32_t avail_coremask;

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	uint32_t pci_console_active;

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	uint32_t icache_prefetch_disable;

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	uint32_t padding;

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	uint64_t InitTLBStart_addr;

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	uint32_t start_app_addr;

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	uint32_t cur_exception_base;

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	uint32_t no_mark_private_data;

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	uint32_t compact_flash_common_base_addr;

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	uint32_t compact_flash_attribute_base_addr;

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	uint32_t led_display_base_addr;

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#else

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	uint32_t start_core0_addr;

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	uint32_t labi_signature;

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	uint32_t pci_console_active;

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	uint32_t avail_coremask;

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	uint32_t padding;

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	uint32_t icache_prefetch_disable;

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	uint64_t InitTLBStart_addr;

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	uint32_t cur_exception_base;

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	uint32_t start_app_addr;

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	uint32_t compact_flash_common_base_addr;

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	uint32_t no_mark_private_data;

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	uint32_t led_display_base_addr;

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	uint32_t compact_flash_attribute_base_addr;

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#endif

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};

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/* If not to copy a lot of bootloader's structures

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   here is only offset of requested member */

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#define AVAIL_COREMASK_OFFSET_IN_LINUX_APP_BOOT_BLOCK	 0x765c

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/* hardcoded in bootloader */

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#define	 LABI_ADDR_IN_BOOTLOADER			 0x700

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#define LINUX_APP_BOOT_BLOCK_NAME "linux-app-boot"

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#define LABI_SIGNATURE 0xAABBCC01

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/*  from uboot-headers/octeon_mem_map.h */

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#define EXCEPTION_BASE_INCR	(4 * 1024)

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			       /* Increment size for exception base addresses (4k minimum) */

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#define EXCEPTION_BASE_BASE	0

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#define BOOTLOADER_PRIV_DATA_BASE	(EXCEPTION_BASE_BASE + 0x800)

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#define BOOTLOADER_BOOT_VECTOR		(BOOTLOADER_PRIV_DATA_BASE)

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#endif /* __OCTEON_BOOT_H__ */

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