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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/arch/mips/fw/lib/call_o32.S
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/* SPDX-License-Identifier: GPL-2.0-or-later */

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/*

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 *	O32 interface for the 64 (or N32) ABI.

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 *

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 *	Copyright (C) 2002, 2014  Maciej W. Rozycki

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 */

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#include <asm/asm.h>

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#include <asm/regdef.h>

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/* O32 register size.  */

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#define O32_SZREG	4

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/* Maximum number of arguments supported.  Must be even!  */

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#define O32_ARGC	32

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/* Number of static registers we save.  */

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#define O32_STATC	11

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/* Argument area frame size.  */

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#define O32_ARGSZ	(O32_SZREG * O32_ARGC)

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/* Static register save area frame size.  */

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#define O32_STATSZ	(SZREG * O32_STATC)

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/* Stack pointer register save area frame size.  */

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#define O32_SPSZ	SZREG

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/* Combined area frame size.  */

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#define O32_FRAMESZ	(O32_ARGSZ + O32_SPSZ + O32_STATSZ)

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/* Switched stack frame size.  */

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#define O32_NFRAMESZ	(O32_ARGSZ + O32_SPSZ)

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		.text

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/*

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 * O32 function call dispatcher, for interfacing 32-bit ROM routines.

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 *

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 * The standard 64 (N32) calling sequence is supported, with a0 holding

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 * a function pointer, a1 a pointer to the new stack to call the

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 * function with or 0 if no stack switching is requested, a2-a7 -- the

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 * function call's first six arguments, and the stack -- the remaining

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 * arguments (up to O32_ARGC, including a2-a7).  Static registers, gp

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 * and fp are preserved, v0 holds the result.  This code relies on the

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 * called o32 function for sp and ra restoration and this dispatcher has

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 * to be placed in a KSEGx (or KUSEG) address space.  Any pointers

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 * passed have to point to addresses within one of these spaces as well.

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 */

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NESTED(call_o32, O32_FRAMESZ, ra)

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		REG_SUBU	sp,O32_FRAMESZ

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		REG_S		ra,O32_FRAMESZ-1*SZREG(sp)

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		REG_S		fp,O32_FRAMESZ-2*SZREG(sp)

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		REG_S		gp,O32_FRAMESZ-3*SZREG(sp)

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		REG_S		s7,O32_FRAMESZ-4*SZREG(sp)

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		REG_S		s6,O32_FRAMESZ-5*SZREG(sp)

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		REG_S		s5,O32_FRAMESZ-6*SZREG(sp)

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		REG_S		s4,O32_FRAMESZ-7*SZREG(sp)

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		REG_S		s3,O32_FRAMESZ-8*SZREG(sp)

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		REG_S		s2,O32_FRAMESZ-9*SZREG(sp)

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		REG_S		s1,O32_FRAMESZ-10*SZREG(sp)

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		REG_S		s0,O32_FRAMESZ-11*SZREG(sp)

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		move		jp,a0

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		move		fp,sp

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		beqz		a1,0f

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		REG_SUBU	fp,a1,O32_NFRAMESZ

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0:

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		REG_S		sp,O32_NFRAMESZ-1*SZREG(fp)

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		sll		a0,a2,zero

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		sll		a1,a3,zero

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		sll		a2,a4,zero

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		sll		a3,a5,zero

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		sw		a6,4*O32_SZREG(fp)

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		sw		a7,5*O32_SZREG(fp)

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		PTR_LA		t0,O32_FRAMESZ(sp)

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		PTR_LA		t1,6*O32_SZREG(fp)

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		li		t2,O32_ARGC-6

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1:

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		lw		t3,(t0)

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		REG_ADDU	t0,SZREG

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		sw		t3,(t1)

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		REG_SUBU	t2,1

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		REG_ADDU	t1,O32_SZREG

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		bnez		t2,1b

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		move		sp,fp

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		jalr		jp

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		REG_L		sp,O32_NFRAMESZ-1*SZREG(sp)

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		REG_L		s0,O32_FRAMESZ-11*SZREG(sp)

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		REG_L		s1,O32_FRAMESZ-10*SZREG(sp)

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		REG_L		s2,O32_FRAMESZ-9*SZREG(sp)

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		REG_L		s3,O32_FRAMESZ-8*SZREG(sp)

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		REG_L		s4,O32_FRAMESZ-7*SZREG(sp)

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		REG_L		s5,O32_FRAMESZ-6*SZREG(sp)

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		REG_L		s6,O32_FRAMESZ-5*SZREG(sp)

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		REG_L		s7,O32_FRAMESZ-4*SZREG(sp)

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		REG_L		gp,O32_FRAMESZ-3*SZREG(sp)

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		REG_L		fp,O32_FRAMESZ-2*SZREG(sp)

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		REG_L		ra,O32_FRAMESZ-1*SZREG(sp)

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		REG_ADDU	sp,O32_FRAMESZ

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		jr		ra

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END(call_o32)

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