/* SPDX-License-Identifier: GPL-2.0-only */12#ifndef __IP30_COMMON_H3#define __IP30_COMMON_H45/*6* Power Switch is wired via BaseIO BRIDGE slot #6.7*8* ACFail is wired via BaseIO BRIDGE slot #7.9*/10#define IP30_POWER_IRQ HEART_L2_INT_POWER_BTN1112#define IP30_HEART_L0_IRQ (MIPS_CPU_IRQ_BASE + 2)13#define IP30_HEART_L1_IRQ (MIPS_CPU_IRQ_BASE + 3)14#define IP30_HEART_L2_IRQ (MIPS_CPU_IRQ_BASE + 4)15#define IP30_HEART_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 5)16#define IP30_HEART_ERR_IRQ (MIPS_CPU_IRQ_BASE + 6)1718extern void __init ip30_install_ipi(void);19extern struct plat_smp_ops ip30_smp_ops;20extern void __init ip30_per_cpu_init(void);2122#endif /* __IP30_COMMON_H */232425