Path: blob/master/arch/mips/txx9/generic/smsc_fdc37m81x.c
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/*1* Interface for smsc fdc48m81x Super IO chip2*3* Author: MontaVista Software, Inc. [email protected]4*5* 2001-2003 (c) MontaVista Software, Inc. This file is licensed under6* the terms of the GNU General Public License version 2. This program7* is licensed "as is" without any warranty of any kind, whether express8* or implied.9*10* Copyright 2004 (c) MontaVista Software, Inc.11*/12#include <linux/init.h>13#include <linux/types.h>14#include <asm/io.h>15#include <asm/txx9/smsc_fdc37m81x.h>1617/* Common Registers */18#define SMSC_FDC37M81X_CONFIG_INDEX 0x0019#define SMSC_FDC37M81X_CONFIG_DATA 0x0120#define SMSC_FDC37M81X_CONF 0x0221#define SMSC_FDC37M81X_INDEX 0x0322#define SMSC_FDC37M81X_DNUM 0x0723#define SMSC_FDC37M81X_DID 0x2024#define SMSC_FDC37M81X_DREV 0x2125#define SMSC_FDC37M81X_PCNT 0x2226#define SMSC_FDC37M81X_PMGT 0x2327#define SMSC_FDC37M81X_OSC 0x2428#define SMSC_FDC37M81X_CONFPA0 0x2629#define SMSC_FDC37M81X_CONFPA1 0x2730#define SMSC_FDC37M81X_TEST4 0x2B31#define SMSC_FDC37M81X_TEST5 0x2C32#define SMSC_FDC37M81X_TEST1 0x2D33#define SMSC_FDC37M81X_TEST2 0x2E34#define SMSC_FDC37M81X_TEST3 0x2F3536/* Logical device numbers */37#define SMSC_FDC37M81X_FDD 0x0038#define SMSC_FDC37M81X_SERIAL1 0x0439#define SMSC_FDC37M81X_SERIAL2 0x0540#define SMSC_FDC37M81X_KBD 0x074142/* Logical device Config Registers */43#define SMSC_FDC37M81X_ACTIVE 0x3044#define SMSC_FDC37M81X_BASEADDR0 0x6045#define SMSC_FDC37M81X_BASEADDR1 0x6146#define SMSC_FDC37M81X_INT 0x7047#define SMSC_FDC37M81X_INT2 0x7248#define SMSC_FDC37M81X_MODE 0xF04950/* Chip Config Values */51#define SMSC_FDC37M81X_CONFIG_ENTER 0x5552#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa53#define SMSC_FDC37M81X_CHIP_ID 0x4d5455static unsigned long g_smsc_fdc37m81x_base;5657static inline unsigned char smsc_fdc37m81x_rd(unsigned char index)58{59outb(index, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);6061return inb(g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_DATA);62}6364static inline void smsc_dc37m81x_wr(unsigned char index, unsigned char data)65{66outb(index, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);67outb(data, g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_DATA);68}6970void smsc_fdc37m81x_config_beg(void)71{72if (g_smsc_fdc37m81x_base) {73outb(SMSC_FDC37M81X_CONFIG_ENTER,74g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);75}76}7778void smsc_fdc37m81x_config_end(void)79{80if (g_smsc_fdc37m81x_base)81outb(SMSC_FDC37M81X_CONFIG_EXIT,82g_smsc_fdc37m81x_base + SMSC_FDC37M81X_CONFIG_INDEX);83}8485u8 smsc_fdc37m81x_config_get(u8 reg)86{87u8 val = 0;8889if (g_smsc_fdc37m81x_base)90val = smsc_fdc37m81x_rd(reg);9192return val;93}9495void smsc_fdc37m81x_config_set(u8 reg, u8 val)96{97if (g_smsc_fdc37m81x_base)98smsc_dc37m81x_wr(reg, val);99}100101unsigned long __init smsc_fdc37m81x_init(unsigned long port)102{103const int field = sizeof(unsigned long) * 2;104u8 chip_id;105106if (g_smsc_fdc37m81x_base)107pr_warn("%s: stepping on old base=0x%0*lx\n", __func__, field,108g_smsc_fdc37m81x_base);109110g_smsc_fdc37m81x_base = port;111112smsc_fdc37m81x_config_beg();113114chip_id = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DID);115if (chip_id == SMSC_FDC37M81X_CHIP_ID)116smsc_fdc37m81x_config_end();117else {118pr_warn("%s: unknown chip id 0x%02x\n", __func__, chip_id);119g_smsc_fdc37m81x_base = 0;120}121122return g_smsc_fdc37m81x_base;123}124125#ifdef DEBUG126static void smsc_fdc37m81x_config_dump_one(const char *key, u8 dev, u8 reg)127{128pr_info("%s: dev=0x%02x reg=0x%02x val=0x%02x\n", key, dev, reg,129smsc_fdc37m81x_rd(reg));130}131132void smsc_fdc37m81x_config_dump(void)133{134u8 orig;135const char *fname = __func__;136137smsc_fdc37m81x_config_beg();138139orig = smsc_fdc37m81x_rd(SMSC_FDC37M81X_DNUM);140141pr_info("%s: common\n", fname);142smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,143SMSC_FDC37M81X_DNUM);144smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,145SMSC_FDC37M81X_DID);146smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,147SMSC_FDC37M81X_DREV);148smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,149SMSC_FDC37M81X_PCNT);150smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_NONE,151SMSC_FDC37M81X_PMGT);152153pr_info("%s: keyboard\n", fname);154smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, SMSC_FDC37M81X_KBD);155smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,156SMSC_FDC37M81X_ACTIVE);157smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,158SMSC_FDC37M81X_INT);159smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,160SMSC_FDC37M81X_INT2);161smsc_fdc37m81x_config_dump_one(fname, SMSC_FDC37M81X_KBD,162SMSC_FDC37M81X_LDCR_F0);163164smsc_dc37m81x_wr(SMSC_FDC37M81X_DNUM, orig);165166smsc_fdc37m81x_config_end();167}168#endif169170171