Path: blob/master/arch/nios2/include/asm/pgtable-bits.h
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/*1* Copyright (C) 2011 Tobias Klauser <[email protected]>2* Copyright (C) 2009 Wind River Systems Inc3*4* This file is subject to the terms and conditions of the GNU General Public5* License. See the file "COPYING" in the main directory of this archive6* for more details.7*/89#ifndef _ASM_NIOS2_PGTABLE_BITS_H10#define _ASM_NIOS2_PGTABLE_BITS_H1112/*13* These are actual hardware defined protection bits in the tlbacc register14* which looks like this:15*16* 31 30 ... 26 25 24 23 22 21 20 19 18 ... 1 017* ignored........ C R W X G PFN............18*/19#define _PAGE_GLOBAL (1<<20)20#define _PAGE_EXEC (1<<21)21#define _PAGE_WRITE (1<<22)22#define _PAGE_READ (1<<23)23#define _PAGE_CACHED (1<<24) /* C: data access cacheable */2425/*26* Software defined bits. They are ignored by the hardware and always read back27* as zero, but can be written as non-zero.28*/29#define _PAGE_PRESENT (1<<25) /* PTE contains a translation */30#define _PAGE_ACCESSED (1<<26) /* page referenced */31#define _PAGE_DIRTY (1<<27) /* dirty page */3233/* We borrow bit 31 to store the exclusive marker in swap PTEs. */34#define _PAGE_SWP_EXCLUSIVE (1<<31)3536#endif /* _ASM_NIOS2_PGTABLE_BITS_H */373839