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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/arch/powerpc/mm/book3s32/nohash_low.S
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/* SPDX-License-Identifier: GPL-2.0-or-later */

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/*

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 *  This file contains low-level assembler routines for managing

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 *  the PowerPC 603 tlb invalidation.

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 */

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#include <asm/page.h>

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#include <asm/ppc_asm.h>

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#include <asm/asm-offsets.h>

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/*

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 * Flush an entry from the TLB

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 */

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#ifdef CONFIG_SMP

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_GLOBAL(_tlbie)

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	lwz	r8,TASK_CPU(r2)

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	oris	r8,r8,11

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	mfmsr	r10

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	rlwinm	r0,r10,0,17,15		/* clear bit 16 (MSR_EE) */

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	rlwinm	r0,r0,0,28,26		/* clear DR */

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	mtmsr	r0

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	isync

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	lis	r9,mmu_hash_lock@h

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	ori	r9,r9,mmu_hash_lock@l

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	tophys(r9,r9)

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10:	lwarx	r7,0,r9

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	cmpwi	0,r7,0

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	bne-	10b

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	stwcx.	r8,0,r9

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	bne-	10b

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	eieio

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	tlbie	r3

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	sync

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	TLBSYNC

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	li	r0,0

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	stw	r0,0(r9)		/* clear mmu_hash_lock */

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	mtmsr	r10

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	isync

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	blr

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_ASM_NOKPROBE_SYMBOL(_tlbie)

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#endif /* CONFIG_SMP */

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/*

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 * Flush the entire TLB. 603/603e only

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 */

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_GLOBAL(_tlbia)

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#if defined(CONFIG_SMP)

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	lwz	r8,TASK_CPU(r2)

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	oris	r8,r8,10

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	mfmsr	r10

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	rlwinm	r0,r10,0,17,15		/* clear bit 16 (MSR_EE) */

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	rlwinm	r0,r0,0,28,26		/* clear DR */

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	mtmsr	r0

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	isync

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	lis	r9,mmu_hash_lock@h

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	ori	r9,r9,mmu_hash_lock@l

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	tophys(r9,r9)

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10:	lwarx	r7,0,r9

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	cmpwi	0,r7,0

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	bne-	10b

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	stwcx.	r8,0,r9

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	bne-	10b

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#endif /* CONFIG_SMP */

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	li	r5, 32

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	lis	r4, KERNELBASE@h

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	mtctr	r5

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	sync

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0:	tlbie	r4

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	addi	r4, r4, 0x1000

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	bdnz	0b

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	sync

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#ifdef CONFIG_SMP

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	TLBSYNC

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	li	r0,0

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	stw	r0,0(r9)		/* clear mmu_hash_lock */

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	mtmsr	r10

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	isync

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#endif /* CONFIG_SMP */

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	blr

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_ASM_NOKPROBE_SYMBOL(_tlbia)

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