Path: blob/master/arch/powerpc/mm/book3s64/mmu_context.c
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// SPDX-License-Identifier: GPL-2.0-or-later1/*2* MMU context allocation for 64-bit kernels.3*4* Copyright (C) 2004 Anton Blanchard, IBM Corp. <[email protected]>5*/67#include <linux/sched.h>8#include <linux/kernel.h>9#include <linux/errno.h>10#include <linux/string.h>11#include <linux/types.h>12#include <linux/mm.h>13#include <linux/pkeys.h>14#include <linux/spinlock.h>15#include <linux/idr.h>16#include <linux/export.h>17#include <linux/gfp.h>18#include <linux/slab.h>19#include <linux/cpu.h>2021#include <asm/mmu_context.h>22#include <asm/pgalloc.h>2324#include "internal.h"2526static DEFINE_IDA(mmu_context_ida);2728static int alloc_context_id(int min_id, int max_id)29{30return ida_alloc_range(&mmu_context_ida, min_id, max_id, GFP_KERNEL);31}3233#ifdef CONFIG_PPC_64S_HASH_MMU34void __init hash__reserve_context_id(int id)35{36int result = ida_alloc_range(&mmu_context_ida, id, id, GFP_KERNEL);3738WARN(result != id, "mmu: Failed to reserve context id %d (rc %d)\n", id, result);39}4041int hash__alloc_context_id(void)42{43unsigned long max;4445if (mmu_has_feature(MMU_FTR_68_BIT_VA))46max = MAX_USER_CONTEXT;47else48max = MAX_USER_CONTEXT_65BIT_VA;4950return alloc_context_id(MIN_USER_CONTEXT, max);51}52EXPORT_SYMBOL_GPL(hash__alloc_context_id);53#endif5455#ifdef CONFIG_PPC_64S_HASH_MMU56static int realloc_context_ids(mm_context_t *ctx)57{58int i, id;5960/*61* id 0 (aka. ctx->id) is special, we always allocate a new one, even if62* there wasn't one allocated previously (which happens in the exec63* case where ctx is newly allocated).64*65* We have to be a bit careful here. We must keep the existing ids in66* the array, so that we can test if they're non-zero to decide if we67* need to allocate a new one. However in case of error we must free the68* ids we've allocated but *not* any of the existing ones (or risk a69* UAF). That's why we decrement i at the start of the error handling70* loop, to skip the id that we just tested but couldn't reallocate.71*/72for (i = 0; i < ARRAY_SIZE(ctx->extended_id); i++) {73if (i == 0 || ctx->extended_id[i]) {74id = hash__alloc_context_id();75if (id < 0)76goto error;7778ctx->extended_id[i] = id;79}80}8182/* The caller expects us to return id */83return ctx->id;8485error:86for (i--; i >= 0; i--) {87if (ctx->extended_id[i])88ida_free(&mmu_context_ida, ctx->extended_id[i]);89}9091return id;92}9394static int hash__init_new_context(struct mm_struct *mm)95{96int index;9798mm->context.hash_context = kmalloc(sizeof(struct hash_mm_context),99GFP_KERNEL);100if (!mm->context.hash_context)101return -ENOMEM;102103/*104* The old code would re-promote on fork, we don't do that when using105* slices as it could cause problem promoting slices that have been106* forced down to 4K.107*108* For book3s we have MMU_NO_CONTEXT set to be ~0. Hence check109* explicitly against context.id == 0. This ensures that we properly110* initialize context slice details for newly allocated mm's (which will111* have id == 0) and don't alter context slice inherited via fork (which112* will have id != 0).113*114* We should not be calling init_new_context() on init_mm. Hence a115* check against 0 is OK.116*/117if (mm->context.id == 0) {118memset(mm->context.hash_context, 0, sizeof(struct hash_mm_context));119slice_init_new_context_exec(mm);120} else {121/* This is fork. Copy hash_context details from current->mm */122memcpy(mm->context.hash_context, current->mm->context.hash_context, sizeof(struct hash_mm_context));123#ifdef CONFIG_PPC_SUBPAGE_PROT124/* inherit subpage prot details if we have one. */125if (current->mm->context.hash_context->spt) {126mm->context.hash_context->spt = kmalloc(sizeof(struct subpage_prot_table),127GFP_KERNEL);128if (!mm->context.hash_context->spt) {129kfree(mm->context.hash_context);130return -ENOMEM;131}132}133#endif134}135136index = realloc_context_ids(&mm->context);137if (index < 0) {138#ifdef CONFIG_PPC_SUBPAGE_PROT139kfree(mm->context.hash_context->spt);140#endif141kfree(mm->context.hash_context);142return index;143}144145pkey_mm_init(mm);146return index;147}148149void hash__setup_new_exec(void)150{151slice_setup_new_exec();152}153#else154static inline int hash__init_new_context(struct mm_struct *mm)155{156BUILD_BUG();157return 0;158}159#endif160161static int radix__init_new_context(struct mm_struct *mm)162{163unsigned long rts_field;164int index, max_id;165166max_id = (1 << mmu_pid_bits) - 1;167index = alloc_context_id(mmu_base_pid, max_id);168if (index < 0)169return index;170171/*172* set the process table entry,173*/174rts_field = radix__get_tree_size();175process_tb[index].prtb0 = cpu_to_be64(rts_field | __pa(mm->pgd) | RADIX_PGD_INDEX_SIZE);176177/*178* Order the above store with subsequent update of the PID179* register (at which point HW can start loading/caching180* the entry) and the corresponding load by the MMU from181* the L2 cache.182*/183asm volatile("ptesync;isync" : : : "memory");184185#ifdef CONFIG_PPC_64S_HASH_MMU186mm->context.hash_context = NULL;187#endif188189return index;190}191192int init_new_context(struct task_struct *tsk, struct mm_struct *mm)193{194int index;195196if (radix_enabled())197index = radix__init_new_context(mm);198else199index = hash__init_new_context(mm);200201if (index < 0)202return index;203204mm->context.id = index;205206mm->context.pte_frag = NULL;207mm->context.pmd_frag = NULL;208#ifdef CONFIG_SPAPR_TCE_IOMMU209mm_iommu_init(mm);210#endif211atomic_set(&mm->context.active_cpus, 0);212atomic_set(&mm->context.copros, 0);213214return 0;215}216217void __destroy_context(int context_id)218{219ida_free(&mmu_context_ida, context_id);220}221EXPORT_SYMBOL_GPL(__destroy_context);222223static void destroy_contexts(mm_context_t *ctx)224{225if (radix_enabled()) {226ida_free(&mmu_context_ida, ctx->id);227} else {228#ifdef CONFIG_PPC_64S_HASH_MMU229int index, context_id;230231for (index = 0; index < ARRAY_SIZE(ctx->extended_id); index++) {232context_id = ctx->extended_id[index];233if (context_id)234ida_free(&mmu_context_ida, context_id);235}236kfree(ctx->hash_context);237#else238BUILD_BUG(); // radix_enabled() should be constant true239#endif240}241}242243static void pmd_frag_destroy(void *pmd_frag)244{245int count;246struct ptdesc *ptdesc;247248ptdesc = virt_to_ptdesc(pmd_frag);249/* drop all the pending references */250count = ((unsigned long)pmd_frag & ~PAGE_MASK) >> PMD_FRAG_SIZE_SHIFT;251/* We allow PTE_FRAG_NR fragments from a PTE page */252if (atomic_sub_and_test(PMD_FRAG_NR - count, &ptdesc->pt_frag_refcount)) {253pagetable_dtor(ptdesc);254pagetable_free(ptdesc);255}256}257258static void destroy_pagetable_cache(struct mm_struct *mm)259{260void *frag;261262frag = mm->context.pte_frag;263if (frag)264pte_frag_destroy(frag);265266frag = mm->context.pmd_frag;267if (frag)268pmd_frag_destroy(frag);269return;270}271272void destroy_context(struct mm_struct *mm)273{274#ifdef CONFIG_SPAPR_TCE_IOMMU275WARN_ON_ONCE(!list_empty(&mm->context.iommu_group_mem_list));276#endif277/*278* For tasks which were successfully initialized we end up calling279* arch_exit_mmap() which clears the process table entry. And280* arch_exit_mmap() is called before the required fullmm TLB flush281* which does a RIC=2 flush. Hence for an initialized task, we do clear282* any cached process table entries.283*284* The condition below handles the error case during task init. We have285* set the process table entry early and if we fail a task286* initialization, we need to ensure the process table entry is zeroed.287* We need not worry about process table entry caches because the task288* never ran with the PID value.289*/290if (radix_enabled())291process_tb[mm->context.id].prtb0 = 0;292else293subpage_prot_free(mm);294destroy_contexts(&mm->context);295mm->context.id = MMU_NO_CONTEXT;296}297298void arch_exit_mmap(struct mm_struct *mm)299{300destroy_pagetable_cache(mm);301302if (radix_enabled()) {303/*304* Radix doesn't have a valid bit in the process table305* entries. However we know that at least P9 implementation306* will avoid caching an entry with an invalid RTS field,307* and 0 is invalid. So this will do.308*309* This runs before the "fullmm" tlb flush in exit_mmap,310* which does a RIC=2 tlbie to clear the process table311* entry. See the "fullmm" comments in tlb-radix.c.312*313* No barrier required here after the store because314* this process will do the invalidate, which starts with315* ptesync.316*/317process_tb[mm->context.id].prtb0 = 0;318}319}320321#ifdef CONFIG_PPC_RADIX_MMU322void radix__switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)323{324mtspr(SPRN_PID, next->context.id);325isync();326}327#endif328329/**330* cleanup_cpu_mmu_context - Clean up MMU details for this CPU (newly offlined)331*332* This clears the CPU from mm_cpumask for all processes, and then flushes the333* local TLB to ensure TLB coherency in case the CPU is onlined again.334*335* KVM guest translations are not necessarily flushed here. If KVM started336* using mm_cpumask or the Linux APIs which do, this would have to be resolved.337*/338#ifdef CONFIG_HOTPLUG_CPU339void cleanup_cpu_mmu_context(void)340{341int cpu = smp_processor_id();342343clear_tasks_mm_cpumask(cpu);344tlbiel_all();345}346#endif347348349