Path: blob/master/arch/powerpc/mm/nohash/book3e_pgtable.c
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// SPDX-License-Identifier: GPL-2.0-or-later1/*2* Copyright 2005, Paul Mackerras, IBM Corporation.3* Copyright 2009, Benjamin Herrenschmidt, IBM Corporation.4* Copyright 2015-2016, Aneesh Kumar K.V, IBM Corporation.5*/67#include <linux/sched.h>8#include <linux/memblock.h>9#include <asm/pgalloc.h>10#include <asm/tlb.h>11#include <asm/dma.h>12#include <asm/text-patching.h>1314#include <mm/mmu_decl.h>1516#ifdef CONFIG_SPARSEMEM_VMEMMAP17/*18* On Book3E CPUs, the vmemmap is currently mapped in the top half of19* the vmalloc space using normal page tables, though the size of20* pages encoded in the PTEs can be different21*/22int __meminit vmemmap_create_mapping(unsigned long start,23unsigned long page_size,24unsigned long phys)25{26/* Create a PTE encoding without page size */27unsigned long i, flags = _PAGE_PRESENT | _PAGE_ACCESSED |28_PAGE_KERNEL_RW;2930/* PTEs only contain page size encodings up to 32M */31BUG_ON(mmu_psize_defs[mmu_vmemmap_psize].shift - 10 > 0xf);3233/* Encode the size in the PTE */34flags |= (mmu_psize_defs[mmu_vmemmap_psize].shift - 10) << 8;3536/* For each PTE for that area, map things. Note that we don't37* increment phys because all PTEs are of the large size and38* thus must have the low bits clear39*/40for (i = 0; i < page_size; i += PAGE_SIZE)41BUG_ON(map_kernel_page(start + i, phys, __pgprot(flags)));4243return 0;44}4546#ifdef CONFIG_MEMORY_HOTPLUG47void vmemmap_remove_mapping(unsigned long start,48unsigned long page_size)49{50}51#endif52#endif /* CONFIG_SPARSEMEM_VMEMMAP */5354static void __init *early_alloc_pgtable(unsigned long size)55{56void *ptr;5758ptr = memblock_alloc_try_nid(size, size, MEMBLOCK_LOW_LIMIT,59__pa(MAX_DMA_ADDRESS), NUMA_NO_NODE);6061if (!ptr)62panic("%s: Failed to allocate %lu bytes align=0x%lx max_addr=%lx\n",63__func__, size, size, __pa(MAX_DMA_ADDRESS));6465return ptr;66}6768/*69* map_kernel_page currently only called by __ioremap70* map_kernel_page adds an entry to the ioremap page table71* and adds an entry to the HPT, possibly bolting it72*/73int __ref map_kernel_page(unsigned long ea, phys_addr_t pa, pgprot_t prot)74{75pgd_t *pgdp;76p4d_t *p4dp;77pud_t *pudp;78pmd_t *pmdp;79pte_t *ptep;8081BUILD_BUG_ON(TASK_SIZE_USER64 > PGTABLE_RANGE);82if (slab_is_available()) {83pgdp = pgd_offset_k(ea);84p4dp = p4d_offset(pgdp, ea);85pudp = pud_alloc(&init_mm, p4dp, ea);86if (!pudp)87return -ENOMEM;88pmdp = pmd_alloc(&init_mm, pudp, ea);89if (!pmdp)90return -ENOMEM;91ptep = pte_alloc_kernel(pmdp, ea);92if (!ptep)93return -ENOMEM;94} else {95pgdp = pgd_offset_k(ea);96p4dp = p4d_offset(pgdp, ea);97if (p4d_none(*p4dp)) {98pudp = early_alloc_pgtable(PUD_TABLE_SIZE);99p4d_populate(&init_mm, p4dp, pudp);100}101pudp = pud_offset(p4dp, ea);102if (pud_none(*pudp)) {103pmdp = early_alloc_pgtable(PMD_TABLE_SIZE);104pud_populate(&init_mm, pudp, pmdp);105}106pmdp = pmd_offset(pudp, ea);107if (!pmd_present(*pmdp)) {108ptep = early_alloc_pgtable(PTE_TABLE_SIZE);109pmd_populate_kernel(&init_mm, pmdp, ptep);110}111ptep = pte_offset_kernel(pmdp, ea);112}113set_pte_at(&init_mm, ea, ptep, pfn_pte(pa >> PAGE_SHIFT, prot));114115smp_wmb();116return 0;117}118119void __patch_exception(int exc, unsigned long addr)120{121unsigned int *ibase = &interrupt_base_book3e;122123/*124* Our exceptions vectors start with a NOP and -then- a branch125* to deal with single stepping from userspace which stops on126* the second instruction. Thus we need to patch the second127* instruction of the exception, not the first one.128*/129130patch_branch(ibase + (exc / 4) + 1, addr, 0);131}132133134