Path: blob/master/arch/powerpc/platforms/83xx/usb_834x.c
26481 views
// SPDX-License-Identifier: GPL-2.0-or-later1/*2* Freescale 83xx USB SOC setup code3*4* Copyright (C) 2007 Freescale Semiconductor, Inc.5* Author: Li Yang6*/78#include <linux/stddef.h>9#include <linux/kernel.h>10#include <linux/errno.h>11#include <linux/of.h>12#include <linux/of_address.h>13#include <linux/io.h>1415#include <sysdev/fsl_soc.h>1617#include "mpc83xx.h"1819int __init mpc834x_usb_cfg(void)20{21unsigned long sccr, sicrl, sicrh;22void __iomem *immap;23struct device_node *np = NULL;24int port0_is_dr = 0, port1_is_dr = 0;25const void *prop, *dr_mode;2627immap = ioremap(get_immrbase(), 0x1000);28if (!immap)29return -ENOMEM;3031/* Read registers */32/* Note: DR and MPH must use the same clock setting in SCCR */33sccr = in_be32(immap + MPC83XX_SCCR_OFFS) & ~MPC83XX_SCCR_USB_MASK;34sicrl = in_be32(immap + MPC83XX_SICRL_OFFS) & ~MPC834X_SICRL_USB_MASK;35sicrh = in_be32(immap + MPC83XX_SICRH_OFFS) & ~MPC834X_SICRH_USB_UTMI;3637np = of_find_compatible_node(NULL, NULL, "fsl-usb2-dr");38if (np) {39sccr |= MPC83XX_SCCR_USB_DRCM_11; /* 1:3 */4041prop = of_get_property(np, "phy_type", NULL);42port1_is_dr = 1;43if (prop &&44(!strcmp(prop, "utmi") || !strcmp(prop, "utmi_wide"))) {45sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;46sicrh |= MPC834X_SICRH_USB_UTMI;47port0_is_dr = 1;48} else if (prop && !strcmp(prop, "serial")) {49dr_mode = of_get_property(np, "dr_mode", NULL);50if (dr_mode && !strcmp(dr_mode, "otg")) {51sicrl |= MPC834X_SICRL_USB0 | MPC834X_SICRL_USB1;52port0_is_dr = 1;53} else {54sicrl |= MPC834X_SICRL_USB1;55}56} else if (prop && !strcmp(prop, "ulpi")) {57sicrl |= MPC834X_SICRL_USB1;58} else {59pr_warn("834x USB PHY type not supported\n");60}61of_node_put(np);62}63np = of_find_compatible_node(NULL, NULL, "fsl-usb2-mph");64if (np) {65sccr |= MPC83XX_SCCR_USB_MPHCM_11; /* 1:3 */6667prop = of_get_property(np, "port0", NULL);68if (prop) {69if (port0_is_dr)70pr_warn("834x USB port0 can't be used by both DR and MPH!\n");71sicrl &= ~MPC834X_SICRL_USB0;72}73prop = of_get_property(np, "port1", NULL);74if (prop) {75if (port1_is_dr)76pr_warn("834x USB port1 can't be used by both DR and MPH!\n");77sicrl &= ~MPC834X_SICRL_USB1;78}79of_node_put(np);80}8182/* Write back */83out_be32(immap + MPC83XX_SCCR_OFFS, sccr);84out_be32(immap + MPC83XX_SICRL_OFFS, sicrl);85out_be32(immap + MPC83XX_SICRH_OFFS, sicrh);8687iounmap(immap);88return 0;89}909192