Path: blob/master/arch/powerpc/platforms/86xx/gef_sbc310.c
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// SPDX-License-Identifier: GPL-2.0-or-later1/*2* GE SBC310 board support3*4* Author: Martyn Welch <[email protected]>5*6* Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.7*8* Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)9* Copyright 2006 Freescale Semiconductor Inc.10*11* NEC fixup adapted from arch/mips/pci/fixup-lm2e.c12*/1314#include <linux/stddef.h>15#include <linux/kernel.h>16#include <linux/pci.h>17#include <linux/kdev_t.h>18#include <linux/delay.h>19#include <linux/seq_file.h>20#include <linux/of.h>21#include <linux/of_address.h>2223#include <asm/time.h>24#include <asm/machdep.h>25#include <asm/pci-bridge.h>26#include <mm/mmu_decl.h>27#include <asm/udbg.h>2829#include <asm/mpic.h>30#include <asm/nvram.h>3132#include <sysdev/fsl_pci.h>33#include <sysdev/fsl_soc.h>34#include <sysdev/ge/ge_pic.h>3536#include "mpc86xx.h"3738#undef DEBUG3940#ifdef DEBUG41#define DBG (fmt...) do { printk(KERN_ERR "SBC310: " fmt); } while (0)42#else43#define DBG (fmt...) do { } while (0)44#endif4546void __iomem *sbc310_regs;4748static void __init gef_sbc310_init_irq(void)49{50struct device_node *cascade_node = NULL;5152mpc86xx_init_irq();5354/*55* There is a simple interrupt handler in the main FPGA, this needs56* to be cascaded into the MPIC57*/58cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");59if (!cascade_node) {60printk(KERN_WARNING "SBC310: No FPGA PIC\n");61return;62}6364gef_pic_init(cascade_node);65of_node_put(cascade_node);66}6768static void __init gef_sbc310_setup_arch(void)69{70struct device_node *regs;71printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");7273#ifdef CONFIG_SMP74mpc86xx_smp_init();75#endif7677fsl_pci_assign_primary();7879/* Remap basic board registers */80regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");81if (regs) {82sbc310_regs = of_iomap(regs, 0);83if (sbc310_regs == NULL)84printk(KERN_WARNING "Unable to map board registers\n");85of_node_put(regs);86}8788#if defined(CONFIG_MMIO_NVRAM)89mmio_nvram_init();90#endif91}9293/* Return the PCB revision */94static unsigned int gef_sbc310_get_board_id(void)95{96unsigned int reg;9798reg = ioread32(sbc310_regs);99return reg & 0xff;100}101102/* Return the PCB revision */103static unsigned int gef_sbc310_get_pcb_rev(void)104{105unsigned int reg;106107reg = ioread32(sbc310_regs);108return (reg >> 8) & 0xff;109}110111/* Return the board (software) revision */112static unsigned int gef_sbc310_get_board_rev(void)113{114unsigned int reg;115116reg = ioread32(sbc310_regs);117return (reg >> 16) & 0xff;118}119120/* Return the FPGA revision */121static unsigned int gef_sbc310_get_fpga_rev(void)122{123unsigned int reg;124125reg = ioread32(sbc310_regs);126return (reg >> 24) & 0xf;127}128129static void gef_sbc310_show_cpuinfo(struct seq_file *m)130{131uint svid = mfspr(SPRN_SVR);132133seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");134135seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());136seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),137('A' + gef_sbc310_get_board_rev() - 1));138seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc310_get_fpga_rev());139140seq_printf(m, "SVR\t\t: 0x%x\n", svid);141142}143144static void gef_sbc310_nec_fixup(struct pci_dev *pdev)145{146unsigned int val;147148/* Do not do the fixup on other platforms! */149if (!machine_is(gef_sbc310))150return;151152printk(KERN_INFO "Running NEC uPD720101 Fixup\n");153154/* Ensure only ports 1 & 2 are enabled */155pci_read_config_dword(pdev, 0xe0, &val);156pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2);157158/* System clock is 48-MHz Oscillator and EHCI Enabled. */159pci_write_config_dword(pdev, 0xe4, 1 << 5);160}161DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,162gef_sbc310_nec_fixup);163164machine_arch_initcall(gef_sbc310, mpc86xx_common_publish_devices);165166define_machine(gef_sbc310) {167.name = "GE SBC310",168.compatible = "gef,sbc310",169.setup_arch = gef_sbc310_setup_arch,170.init_IRQ = gef_sbc310_init_irq,171.show_cpuinfo = gef_sbc310_show_cpuinfo,172.get_irq = mpic_get_irq,173.time_init = mpc86xx_time_init,174.progress = udbg_progress,175#ifdef CONFIG_PCI176.pcibios_fixup_bus = fsl_pcibios_fixup_bus,177#endif178};179180181