Path: blob/master/arch/powerpc/platforms/8xx/m8xx_setup.c
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// SPDX-License-Identifier: GPL-2.01/*2* Copyright (C) 1995 Linus Torvalds3* Adapted from 'alpha' version by Gary Thomas4* Modified by Cort Dougan ([email protected])5* Modified for MBX using prep/chrp/pmac functions by Dan ([email protected])6* Further modified for generic 8xx by Dan.7*/89/*10* bootup setup stuff..11*/1213#include <linux/kernel.h>14#include <linux/interrupt.h>15#include <linux/init.h>16#include <linux/time.h>17#include <linux/rtc.h>18#include <linux/fsl_devices.h>19#include <linux/of.h>20#include <linux/of_irq.h>2122#include <asm/io.h>23#include <asm/8xx_immap.h>24#include <mm/mmu_decl.h>2526#include "pic.h"2728#include "mpc8xx.h"2930/* A place holder for time base interrupts, if they are ever enabled. */31static irqreturn_t timebase_interrupt(int irq, void *dev)32{33printk ("timebase_interrupt()\n");3435return IRQ_HANDLED;36}3738static int __init get_freq(char *name, unsigned long *val)39{40struct device_node *cpu;41const unsigned int *fp;42int found = 0;4344/* The cpu node should have timebase and clock frequency properties */45cpu = of_get_cpu_node(0, NULL);4647if (cpu) {48fp = of_get_property(cpu, name, NULL);49if (fp) {50found = 1;51*val = *fp;52}5354of_node_put(cpu);55}5657return found;58}5960/* The decrementer counts at the system (internal) clock frequency divided by61* sixteen, or external oscillator divided by four. We force the processor62* to use system clock divided by sixteen.63*/64void __init mpc8xx_calibrate_decr(void)65{66struct device_node *cpu;67int irq, virq;6869/* Unlock the SCCR. */70out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, ~KAPWR_KEY);71out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, KAPWR_KEY);7273/* Force all 8xx processors to use divide by 16 processor clock. */74setbits32(&mpc8xx_immr->im_clkrst.car_sccr, 0x02000000);7576/* Processor frequency is MHz.77*/78ppc_proc_freq = 50000000;79if (!get_freq("clock-frequency", &ppc_proc_freq))80printk(KERN_ERR "WARNING: Estimating processor frequency "81"(not found)\n");8283ppc_tb_freq = ppc_proc_freq / 16;84printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);8586/* Perform some more timer/timebase initialization. This used87* to be done elsewhere, but other changes caused it to get88* called more than once....that is a bad thing.89*90* First, unlock all of the registers we are going to modify.91* To protect them from corruption during power down, registers92* that are maintained by keep alive power are "locked". To93* modify these registers we have to write the key value to94* the key location associated with the register.95* Some boards power up with these unlocked, while others96* are locked. Writing anything (including the unlock code?)97* to the unlocked registers will lock them again. So, here98* we guarantee the registers are locked, then we unlock them99* for our use.100*/101out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, ~KAPWR_KEY);102out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, ~KAPWR_KEY);103out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, ~KAPWR_KEY);104out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, KAPWR_KEY);105out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, KAPWR_KEY);106out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, KAPWR_KEY);107108/* Disable the RTC one second and alarm interrupts. */109clrbits16(&mpc8xx_immr->im_sit.sit_rtcsc, (RTCSC_SIE | RTCSC_ALE));110111/* Enable the RTC */112setbits16(&mpc8xx_immr->im_sit.sit_rtcsc, (RTCSC_RTF | RTCSC_RTE));113114/* Enabling the decrementer also enables the timebase interrupts115* (or from the other point of view, to get decrementer interrupts116* we have to enable the timebase). The decrementer interrupt117* is wired into the vector table, nothing to do here for that.118*/119cpu = of_get_cpu_node(0, NULL);120virq= irq_of_parse_and_map(cpu, 0);121of_node_put(cpu);122irq = virq_to_hw(virq);123124out_be16(&mpc8xx_immr->im_sit.sit_tbscr,125((1 << (7 - (irq / 2))) << 8) | (TBSCR_TBF | TBSCR_TBE));126127if (request_irq(virq, timebase_interrupt, IRQF_NO_THREAD, "tbint",128NULL))129panic("Could not allocate timer IRQ!");130}131132/* The RTC on the MPC8xx is an internal register.133* We want to protect this during power down, so we need to unlock,134* modify, and re-lock.135*/136137int mpc8xx_set_rtc_time(struct rtc_time *tm)138{139time64_t time;140141time = rtc_tm_to_time64(tm);142143out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, KAPWR_KEY);144out_be32(&mpc8xx_immr->im_sit.sit_rtc, (u32)time);145out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, ~KAPWR_KEY);146147return 0;148}149150void mpc8xx_get_rtc_time(struct rtc_time *tm)151{152unsigned long data;153154/* Get time from the RTC. */155data = in_be32(&mpc8xx_immr->im_sit.sit_rtc);156rtc_time64_to_tm(data, tm);157return;158}159160void __noreturn mpc8xx_restart(char *cmd)161{162local_irq_disable();163164setbits32(&mpc8xx_immr->im_clkrst.car_plprcr, 0x00000080);165/* Clear the ME bit in MSR to cause checkstop on machine check166*/167mtmsr(mfmsr() & ~0x1000);168169in_8(&mpc8xx_immr->im_clkrst.res[0]);170panic("Restart failed\n");171}172173174