Path: blob/master/arch/powerpc/platforms/cell/spufs/fault.c
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// SPDX-License-Identifier: GPL-2.0-or-later1/*2* Low-level SPU handling3*4* (C) Copyright IBM Deutschland Entwicklung GmbH 20055*6* Author: Arnd Bergmann <[email protected]>7*/8#include <linux/sched/signal.h>9#include <linux/mm.h>1011#include <asm/spu.h>12#include <asm/spu_csa.h>1314#include "spufs.h"1516/**17* Handle an SPE event, depending on context SPU_CREATE_EVENTS_ENABLED flag.18*19* If the context was created with events, we just set the return event.20* Otherwise, send an appropriate signal to the process.21*/22static void spufs_handle_event(struct spu_context *ctx,23unsigned long ea, int type)24{25if (ctx->flags & SPU_CREATE_EVENTS_ENABLED) {26ctx->event_return |= type;27wake_up_all(&ctx->stop_wq);28return;29}3031switch (type) {32case SPE_EVENT_INVALID_DMA:33force_sig_fault(SIGBUS, BUS_OBJERR, NULL);34break;35case SPE_EVENT_SPE_DATA_STORAGE:36ctx->ops->restart_dma(ctx);37force_sig_fault(SIGSEGV, SEGV_ACCERR, (void __user *)ea);38break;39case SPE_EVENT_DMA_ALIGNMENT:40/* DAR isn't set for an alignment fault :( */41force_sig_fault(SIGBUS, BUS_ADRALN, NULL);42break;43case SPE_EVENT_SPE_ERROR:44force_sig_fault(45SIGILL, ILL_ILLOPC,46(void __user *)(unsigned long)47ctx->ops->npc_read(ctx) - 4);48break;49}50}5152int spufs_handle_class0(struct spu_context *ctx)53{54unsigned long stat = ctx->csa.class_0_pending & CLASS0_INTR_MASK;5556if (likely(!stat))57return 0;5859if (stat & CLASS0_DMA_ALIGNMENT_INTR)60spufs_handle_event(ctx, ctx->csa.class_0_dar,61SPE_EVENT_DMA_ALIGNMENT);6263if (stat & CLASS0_INVALID_DMA_COMMAND_INTR)64spufs_handle_event(ctx, ctx->csa.class_0_dar,65SPE_EVENT_INVALID_DMA);6667if (stat & CLASS0_SPU_ERROR_INTR)68spufs_handle_event(ctx, ctx->csa.class_0_dar,69SPE_EVENT_SPE_ERROR);7071ctx->csa.class_0_pending = 0;7273return -EIO;74}7576/*77* bottom half handler for page faults, we can't do this from78* interrupt context, since we might need to sleep.79* we also need to give up the mutex so we can get scheduled80* out while waiting for the backing store.81*82* TODO: try calling hash_page from the interrupt handler first83* in order to speed up the easy case.84*/85int spufs_handle_class1(struct spu_context *ctx)86{87u64 ea, dsisr, access;88unsigned long flags;89vm_fault_t flt = 0;90int ret;9192/*93* dar and dsisr get passed from the registers94* to the spu_context, to this function, but not95* back to the spu if it gets scheduled again.96*97* if we don't handle the fault for a saved context98* in time, we can still expect to get the same fault99* the immediately after the context restore.100*/101ea = ctx->csa.class_1_dar;102dsisr = ctx->csa.class_1_dsisr;103104if (!(dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)))105return 0;106107spuctx_switch_state(ctx, SPU_UTIL_IOWAIT);108109pr_debug("ctx %p: ea %016llx, dsisr %016llx state %d\n", ctx, ea,110dsisr, ctx->state);111112ctx->stats.hash_flt++;113if (ctx->state == SPU_STATE_RUNNABLE)114ctx->spu->stats.hash_flt++;115116/* we must not hold the lock when entering copro_handle_mm_fault */117spu_release(ctx);118119access = (_PAGE_PRESENT | _PAGE_READ);120access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_WRITE : 0UL;121local_irq_save(flags);122ret = hash_page(ea, access, 0x300, dsisr);123local_irq_restore(flags);124125/* hashing failed, so try the actual fault handler */126if (ret)127ret = copro_handle_mm_fault(current->mm, ea, dsisr, &flt);128129/*130* This is nasty: we need the state_mutex for all the bookkeeping even131* if the syscall was interrupted by a signal. ewww.132*/133mutex_lock(&ctx->state_mutex);134135/*136* Clear dsisr under ctxt lock after handling the fault, so that137* time slicing will not preempt the context while the page fault138* handler is running. Context switch code removes mappings.139*/140ctx->csa.class_1_dar = ctx->csa.class_1_dsisr = 0;141142/*143* If we handled the fault successfully and are in runnable144* state, restart the DMA.145* In case of unhandled error report the problem to user space.146*/147if (!ret) {148if (flt & VM_FAULT_MAJOR)149ctx->stats.maj_flt++;150else151ctx->stats.min_flt++;152if (ctx->state == SPU_STATE_RUNNABLE) {153if (flt & VM_FAULT_MAJOR)154ctx->spu->stats.maj_flt++;155else156ctx->spu->stats.min_flt++;157}158159if (ctx->spu)160ctx->ops->restart_dma(ctx);161} else162spufs_handle_event(ctx, ea, SPE_EVENT_SPE_DATA_STORAGE);163164spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);165return ret;166}167168169