Path: blob/master/arch/powerpc/platforms/cell/spufs/spu_utils.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */1/*2* utils.h: Utilities for SPU-side of the context switch operation.3*4* (C) Copyright IBM 20055*/67#ifndef _SPU_CONTEXT_UTILS_H_8#define _SPU_CONTEXT_UTILS_H_910/*11* 64-bit safe EA.12*/13typedef union {14unsigned long long ull;15unsigned int ui[2];16} addr64;1718/*19* 128-bit register template.20*/21typedef union {22unsigned int slot[4];23vector unsigned int v;24} spu_reg128v;2526/*27* DMA list structure.28*/29struct dma_list_elem {30unsigned int size;31unsigned int ea_low;32};3334/*35* Declare storage for 8-byte aligned DMA list.36*/37struct dma_list_elem dma_list[15] __attribute__ ((aligned(8)));3839/*40* External definition for storage41* declared in crt0.42*/43extern spu_reg128v regs_spill[NR_SPU_SPILL_REGS];4445/*46* Compute LSCSA byte offset for a given field.47*/48static struct spu_lscsa *dummy = (struct spu_lscsa *)0;49#define LSCSA_BYTE_OFFSET(_field) \50((char *)(&(dummy->_field)) - (char *)(&(dummy->gprs[0].slot[0])))51#define LSCSA_QW_OFFSET(_field) (LSCSA_BYTE_OFFSET(_field) >> 4)5253static inline void set_event_mask(void)54{55unsigned int event_mask = 0;5657/* Save, Step 4:58* Restore, Step 1:59* Set the SPU_RdEventMsk channel to zero to mask60* all events.61*/62spu_writech(SPU_WrEventMask, event_mask);63}6465static inline void set_tag_mask(void)66{67unsigned int tag_mask = 1;6869/* Save, Step 5:70* Restore, Step 2:71* Set the SPU_WrTagMsk channel to '01' to unmask72* only tag group 0.73*/74spu_writech(MFC_WrTagMask, tag_mask);75}7677static inline void build_dma_list(addr64 lscsa_ea)78{79unsigned int ea_low;80int i;8182/* Save, Step 6:83* Restore, Step 3:84* Update the effective address for the CSA in the85* pre-canned DMA-list in local storage.86*/87ea_low = lscsa_ea.ui[1];88ea_low += LSCSA_BYTE_OFFSET(ls[16384]);8990for (i = 0; i < 15; i++, ea_low += 16384) {91dma_list[i].size = 16384;92dma_list[i].ea_low = ea_low;93}94}9596static inline void enqueue_putllc(addr64 lscsa_ea)97{98unsigned int ls = 0;99unsigned int size = 128;100unsigned int tag_id = 0;101unsigned int cmd = 0xB4; /* PUTLLC */102103/* Save, Step 12:104* Restore, Step 7:105* Send a PUTLLC (tag 0) command to the MFC using106* an effective address in the CSA in order to107* remove any possible lock-line reservation.108*/109spu_writech(MFC_LSA, ls);110spu_writech(MFC_EAH, lscsa_ea.ui[0]);111spu_writech(MFC_EAL, lscsa_ea.ui[1]);112spu_writech(MFC_Size, size);113spu_writech(MFC_TagID, tag_id);114spu_writech(MFC_Cmd, cmd);115}116117static inline void set_tag_update(void)118{119unsigned int update_any = 1;120121/* Save, Step 15:122* Restore, Step 8:123* Write the MFC_TagUpdate channel with '01'.124*/125spu_writech(MFC_WrTagUpdate, update_any);126}127128static inline void read_tag_status(void)129{130/* Save, Step 16:131* Restore, Step 9:132* Read the MFC_TagStat channel data.133*/134spu_readch(MFC_RdTagStat);135}136137static inline void read_llar_status(void)138{139/* Save, Step 17:140* Restore, Step 10:141* Read the MFC_AtomicStat channel data.142*/143spu_readch(MFC_RdAtomicStat);144}145146#endif /* _SPU_CONTEXT_UTILS_H_ */147148149