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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/arch/powerpc/platforms/cell/spufs/spu_utils.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* utils.h: Utilities for SPU-side of the context switch operation.
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*
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* (C) Copyright IBM 2005
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*/
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#ifndef _SPU_CONTEXT_UTILS_H_
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#define _SPU_CONTEXT_UTILS_H_
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/*
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* 64-bit safe EA.
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*/
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typedef union {
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unsigned long long ull;
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unsigned int ui[2];
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} addr64;
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/*
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* 128-bit register template.
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*/
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typedef union {
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unsigned int slot[4];
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vector unsigned int v;
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} spu_reg128v;
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/*
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* DMA list structure.
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*/
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struct dma_list_elem {
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unsigned int size;
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unsigned int ea_low;
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};
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/*
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* Declare storage for 8-byte aligned DMA list.
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*/
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struct dma_list_elem dma_list[15] __attribute__ ((aligned(8)));
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/*
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* External definition for storage
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* declared in crt0.
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*/
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extern spu_reg128v regs_spill[NR_SPU_SPILL_REGS];
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/*
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* Compute LSCSA byte offset for a given field.
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*/
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static struct spu_lscsa *dummy = (struct spu_lscsa *)0;
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#define LSCSA_BYTE_OFFSET(_field) \
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((char *)(&(dummy->_field)) - (char *)(&(dummy->gprs[0].slot[0])))
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#define LSCSA_QW_OFFSET(_field) (LSCSA_BYTE_OFFSET(_field) >> 4)
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static inline void set_event_mask(void)
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{
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unsigned int event_mask = 0;
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/* Save, Step 4:
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* Restore, Step 1:
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* Set the SPU_RdEventMsk channel to zero to mask
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* all events.
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*/
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spu_writech(SPU_WrEventMask, event_mask);
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}
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static inline void set_tag_mask(void)
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{
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unsigned int tag_mask = 1;
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/* Save, Step 5:
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* Restore, Step 2:
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* Set the SPU_WrTagMsk channel to '01' to unmask
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* only tag group 0.
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*/
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spu_writech(MFC_WrTagMask, tag_mask);
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}
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static inline void build_dma_list(addr64 lscsa_ea)
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{
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unsigned int ea_low;
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int i;
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/* Save, Step 6:
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* Restore, Step 3:
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* Update the effective address for the CSA in the
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* pre-canned DMA-list in local storage.
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*/
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ea_low = lscsa_ea.ui[1];
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ea_low += LSCSA_BYTE_OFFSET(ls[16384]);
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for (i = 0; i < 15; i++, ea_low += 16384) {
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dma_list[i].size = 16384;
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dma_list[i].ea_low = ea_low;
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}
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}
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static inline void enqueue_putllc(addr64 lscsa_ea)
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{
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unsigned int ls = 0;
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unsigned int size = 128;
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unsigned int tag_id = 0;
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unsigned int cmd = 0xB4; /* PUTLLC */
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/* Save, Step 12:
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* Restore, Step 7:
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* Send a PUTLLC (tag 0) command to the MFC using
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* an effective address in the CSA in order to
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* remove any possible lock-line reservation.
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*/
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spu_writech(MFC_LSA, ls);
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spu_writech(MFC_EAH, lscsa_ea.ui[0]);
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spu_writech(MFC_EAL, lscsa_ea.ui[1]);
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spu_writech(MFC_Size, size);
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spu_writech(MFC_TagID, tag_id);
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spu_writech(MFC_Cmd, cmd);
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}
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static inline void set_tag_update(void)
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{
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unsigned int update_any = 1;
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/* Save, Step 15:
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* Restore, Step 8:
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* Write the MFC_TagUpdate channel with '01'.
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*/
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spu_writech(MFC_WrTagUpdate, update_any);
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}
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static inline void read_tag_status(void)
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{
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/* Save, Step 16:
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* Restore, Step 9:
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* Read the MFC_TagStat channel data.
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*/
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spu_readch(MFC_RdTagStat);
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}
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static inline void read_llar_status(void)
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{
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/* Save, Step 17:
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* Restore, Step 10:
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* Read the MFC_AtomicStat channel data.
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*/
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spu_readch(MFC_RdAtomicStat);
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}
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#endif /* _SPU_CONTEXT_UTILS_H_ */
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