/* SPDX-License-Identifier: GPL-2.0-only */1/*2* Enter and leave sleep state on chips with 6xx-style HID03* power management bits, which don't leave sleep state via reset.4*5* Author: Scott Wood <[email protected]>6*7* Copyright (c) 2006-2007 Freescale Semiconductor, Inc.8*/910#include <asm/ppc_asm.h>11#include <asm/reg.h>12#include <asm/thread_info.h>13#include <asm/asm-offsets.h>1415_GLOBAL(mpc6xx_enter_standby)16mflr r41718mfspr r5, SPRN_HID019rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP)20oris r5, r5, HID0_SLEEP@h21mtspr SPRN_HID0, r522isync2324lis r5, ret_from_standby@h25ori r5, r5, ret_from_standby@l26mtlr r52728lwz r6, TI_LOCAL_FLAGS(r2)29ori r6, r6, _TLF_SLEEPING30stw r6, TI_LOCAL_FLAGS(r2)3132mfmsr r533ori r5, r5, MSR_EE34oris r5, r5, MSR_POW@h35sync36mtmsr r537isync38391: b 1b4041ret_from_standby:42mfspr r5, SPRN_HID043rlwinm r5, r5, 0, ~HID0_SLEEP44mtspr SPRN_HID0, r54546mtlr r447blr484950