Path: blob/master/arch/powerpc/sysdev/xive/xive-internal.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */1/*2* Copyright 2016,2017 IBM Corporation.3*/4#ifndef __XIVE_INTERNAL_H5#define __XIVE_INTERNAL_H67/*8* A "disabled" interrupt should never fire, to catch problems9* we set its logical number to this10*/11#define XIVE_BAD_IRQ 0x7fffffff12#define XIVE_MAX_IRQ (XIVE_BAD_IRQ - 1)1314/* Each CPU carry one of these with various per-CPU state */15struct xive_cpu {16#ifdef CONFIG_SMP17/* HW irq number and data of IPI */18u32 hw_ipi;19struct xive_irq_data ipi_data;20#endif /* CONFIG_SMP */2122int chip_id;2324/* Queue datas. Only one is populated */25#define XIVE_MAX_QUEUES 826struct xive_q queue[XIVE_MAX_QUEUES];2728/*29* Pending mask. Each bit corresponds to a priority that30* potentially has pending interrupts.31*/32u8 pending_prio;3334/* Cache of HW CPPR */35u8 cppr;36};3738/* Backend ops */39struct xive_ops {40int (*populate_irq_data)(u32 hw_irq, struct xive_irq_data *data);41int (*configure_irq)(u32 hw_irq, u32 target, u8 prio, u32 sw_irq);42int (*get_irq_config)(u32 hw_irq, u32 *target, u8 *prio,43u32 *sw_irq);44int (*setup_queue)(unsigned int cpu, struct xive_cpu *xc, u8 prio);45void (*cleanup_queue)(unsigned int cpu, struct xive_cpu *xc, u8 prio);46void (*prepare_cpu)(unsigned int cpu, struct xive_cpu *xc);47void (*setup_cpu)(unsigned int cpu, struct xive_cpu *xc);48void (*teardown_cpu)(unsigned int cpu, struct xive_cpu *xc);49bool (*match)(struct device_node *np);50void (*shutdown)(void);5152void (*update_pending)(struct xive_cpu *xc);53void (*sync_source)(u32 hw_irq);54u64 (*esb_rw)(u32 hw_irq, u32 offset, u64 data, bool write);55#ifdef CONFIG_SMP56int (*get_ipi)(unsigned int cpu, struct xive_cpu *xc);57void (*put_ipi)(unsigned int cpu, struct xive_cpu *xc);58#endif59int (*debug_show)(struct seq_file *m, void *private);60int (*debug_create)(struct dentry *xive_dir);61const char *name;62};6364bool xive_core_init(struct device_node *np, const struct xive_ops *ops,65void __iomem *area, u32 offset, u8 max_prio);66__be32 *xive_queue_page_alloc(unsigned int cpu, u32 queue_shift);67int xive_core_debug_init(void);6869static inline u32 xive_alloc_order(u32 queue_shift)70{71return (queue_shift > PAGE_SHIFT) ? (queue_shift - PAGE_SHIFT) : 0;72}7374extern bool xive_cmdline_disabled;75extern bool xive_has_save_restore;7677#endif /* __XIVE_INTERNAL_H */787980