jh7110-orangepi-rv.dts

// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
 * Copyright (C) 2025 Icenowy Zheng <[email protected]>
 */

/dts-v1/;
#include "jh7110-common.dtsi"

/ {
	model = "Xunlong Orange Pi RV";
	compatible = "xunlong,orangepi-rv", "starfive,jh7110";

	/* This regulator is always on by hardware */
	reg_vcc3v3_pcie: regulator-vcc3v3-pcie {
		compatible = "regulator-fixed";
		regulator-name = "vcc3v3-pcie";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	wifi_pwrseq: wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&sysgpio 62 GPIO_ACTIVE_LOW>;
	};
};

&gmac0 {
	assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>;
	assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>;
	starfive,tx-use-rgmii-clk;
	status = "okay";
};

&mmc0 {
	#address-cells = <1>;
	#size-cells = <0>;
	cap-sd-highspeed;
	mmc-pwrseq = <&wifi_pwrseq>;
	vmmc-supply = <&reg_vcc3v3_pcie>;
	vqmmc-supply = <&vcc_3v3>;
	status = "okay";

	ap6256: wifi@1 {
		compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac";
		reg = <1>;
		/* TODO: out-of-band IRQ on GPIO21, lacking pinctrl support */
	};
};

&mmc1 {
	cd-gpios = <&sysgpio 41 GPIO_ACTIVE_HIGH>;
};

&pcie0 {
	status = "okay";
};

&pcie1 {
	status = "okay";
};

&phy0 {
	rx-internal-delay-ps = <1500>;
	tx-internal-delay-ps = <1500>;
	motorcomm,rx-clk-drv-microamp = <3970>;
	motorcomm,rx-data-drv-microamp = <2910>;
	motorcomm,tx-clk-adj-enabled;
	motorcomm,tx-clk-10-inverted;
	motorcomm,tx-clk-100-inverted;
	motorcomm,tx-clk-1000-inverted;
};

&pwmdac {
	status = "okay";
};