CoCalc -- jh7110-pinfunc.h

GitHub Repository: torvalds/linux
Path: blob/master/arch/riscv/boot/dts/starfive/jh7110-pinfunc.h
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/* SPDX-License-Identifier: GPL-2.0 OR MIT */
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/*
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 * Copyright (C) 2022 Emil Renner Berthing <[email protected]>
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 * Copyright (C) 2022 StarFive Technology Co., Ltd.
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 */
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#ifndef __JH7110_PINFUNC_H__
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#define __JH7110_PINFUNC_H__
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/*
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 * mux bits:
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 *  | 31 - 24 | 23 - 16 | 15 - 10 |  9 - 8   |  7 - 0  |
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 *  |  din    |  dout   |  doen   | function | gpio nr |
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 *
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 * dout:     output signal
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 * doen:     output enable signal
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 * din:      optional input signal, 0xff = none
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 * function: function selector
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 * gpio nr:  gpio number, 0 - 63
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 */
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#define GPIOMUX(n, dout, doen, din) ( \
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		(((din)  & 0xff) << 24) | \
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		(((dout) & 0xff) << 16) | \
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		(((doen) & 0x3f) << 10) | \
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		((n) & 0x3f))
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#define PINMUX(n, func) ((1 << 10) | (((func) & 0x3) << 8) | ((n) & 0xff))
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/* sys_iomux dout */
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#define GPOUT_LOW				0
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#define GPOUT_HIGH				1
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#define GPOUT_SYS_WAVE511_UART_TX		2
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#define GPOUT_SYS_CAN0_STBY			3
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#define GPOUT_SYS_CAN0_TST_NEXT_BIT		4
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#define GPOUT_SYS_CAN0_TST_SAMPLE_POINT		5
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#define GPOUT_SYS_CAN0_TXD			6
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#define GPOUT_SYS_USB_DRIVE_VBUS		7
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#define GPOUT_SYS_QSPI_CS1			8
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#define GPOUT_SYS_SPDIF				9
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#define GPOUT_SYS_HDMI_CEC_SDA			10
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#define GPOUT_SYS_HDMI_DDC_SCL			11
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#define GPOUT_SYS_HDMI_DDC_SDA			12
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#define GPOUT_SYS_WATCHDOG			13
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#define GPOUT_SYS_I2C0_CLK			14
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#define GPOUT_SYS_I2C0_DATA			15
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#define GPOUT_SYS_SDIO0_BACK_END_POWER		16
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#define GPOUT_SYS_SDIO0_CARD_POWER_EN		17
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#define GPOUT_SYS_SDIO0_CCMD_OD_PULLUP_EN	18
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#define GPOUT_SYS_SDIO0_RST			19
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#define GPOUT_SYS_UART0_TX			20
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#define GPOUT_SYS_HIFI4_JTAG_TDO		21
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#define GPOUT_SYS_JTAG_TDO			22
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#define GPOUT_SYS_PDM_MCLK			23
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#define GPOUT_SYS_PWM_CHANNEL0			24
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#define GPOUT_SYS_PWM_CHANNEL1			25
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#define GPOUT_SYS_PWM_CHANNEL2			26
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#define GPOUT_SYS_PWM_CHANNEL3			27
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#define GPOUT_SYS_PWMDAC_LEFT			28
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#define GPOUT_SYS_PWMDAC_RIGHT			29
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#define GPOUT_SYS_SPI0_CLK			30
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#define GPOUT_SYS_SPI0_FSS			31
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#define GPOUT_SYS_SPI0_TXD			32
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#define GPOUT_SYS_GMAC_PHYCLK			33
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#define GPOUT_SYS_I2SRX_BCLK			34
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#define GPOUT_SYS_I2SRX_LRCK			35
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#define GPOUT_SYS_I2STX0_BCLK			36
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#define GPOUT_SYS_I2STX0_LRCK			37
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#define GPOUT_SYS_MCLK				38
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#define GPOUT_SYS_TDM_CLK			39
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#define GPOUT_SYS_TDM_SYNC			40
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#define GPOUT_SYS_TDM_TXD			41
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#define GPOUT_SYS_TRACE_DATA0			42
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#define GPOUT_SYS_TRACE_DATA1			43
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#define GPOUT_SYS_TRACE_DATA2			44
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#define GPOUT_SYS_TRACE_DATA3			45
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#define GPOUT_SYS_TRACE_REF			46
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#define GPOUT_SYS_CAN1_STBY			47
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#define GPOUT_SYS_CAN1_TST_NEXT_BIT		48
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#define GPOUT_SYS_CAN1_TST_SAMPLE_POINT		49
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#define GPOUT_SYS_CAN1_TXD			50
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#define GPOUT_SYS_I2C1_CLK			51
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#define GPOUT_SYS_I2C1_DATA			52
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#define GPOUT_SYS_SDIO1_BACK_END_POWER		53
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#define GPOUT_SYS_SDIO1_CARD_POWER_EN		54
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#define GPOUT_SYS_SDIO1_CLK			55
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#define GPOUT_SYS_SDIO1_CMD_OD_PULLUP_EN	56
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#define GPOUT_SYS_SDIO1_CMD			57
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#define GPOUT_SYS_SDIO1_DATA0			58
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#define GPOUT_SYS_SDIO1_DATA1			59
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#define GPOUT_SYS_SDIO1_DATA2			60
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#define GPOUT_SYS_SDIO1_DATA3			61
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#define GPOUT_SYS_SDIO1_DATA4			62
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#define GPOUT_SYS_SDIO1_DATA5			63
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#define GPOUT_SYS_SDIO1_DATA6			64
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#define GPOUT_SYS_SDIO1_DATA7			65
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#define GPOUT_SYS_SDIO1_RST			66
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#define GPOUT_SYS_UART1_RTS			67
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#define GPOUT_SYS_UART1_TX			68
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#define GPOUT_SYS_I2STX1_SDO0			69
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#define GPOUT_SYS_I2STX1_SDO1			70
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#define GPOUT_SYS_I2STX1_SDO2			71
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#define GPOUT_SYS_I2STX1_SDO3			72
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#define GPOUT_SYS_SPI1_CLK			73
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#define GPOUT_SYS_SPI1_FSS			74
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#define GPOUT_SYS_SPI1_TXD			75
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#define GPOUT_SYS_I2C2_CLK			76
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#define GPOUT_SYS_I2C2_DATA			77
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#define GPOUT_SYS_UART2_RTS			78
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#define GPOUT_SYS_UART2_TX			79
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#define GPOUT_SYS_SPI2_CLK			80
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#define GPOUT_SYS_SPI2_FSS			81
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#define GPOUT_SYS_SPI2_TXD			82
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#define GPOUT_SYS_I2C3_CLK			83
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#define GPOUT_SYS_I2C3_DATA			84
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#define GPOUT_SYS_UART3_TX			85
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#define GPOUT_SYS_SPI3_CLK			86
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#define GPOUT_SYS_SPI3_FSS			87
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#define GPOUT_SYS_SPI3_TXD			88
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#define GPOUT_SYS_I2C4_CLK			89
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#define GPOUT_SYS_I2C4_DATA			90
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#define GPOUT_SYS_UART4_RTS			91
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#define GPOUT_SYS_UART4_TX			92
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#define GPOUT_SYS_SPI4_CLK			93
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#define GPOUT_SYS_SPI4_FSS			94
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#define GPOUT_SYS_SPI4_TXD			95
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#define GPOUT_SYS_I2C5_CLK			96
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#define GPOUT_SYS_I2C5_DATA			97
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#define GPOUT_SYS_UART5_RTS			98
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#define GPOUT_SYS_UART5_TX			99
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#define GPOUT_SYS_SPI5_CLK			100
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#define GPOUT_SYS_SPI5_FSS			101
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#define GPOUT_SYS_SPI5_TXD			102
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#define GPOUT_SYS_I2C6_CLK			103
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#define GPOUT_SYS_I2C6_DATA			104
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#define GPOUT_SYS_SPI6_CLK			105
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#define GPOUT_SYS_SPI6_FSS			106
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#define GPOUT_SYS_SPI6_TXD			107
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/* aon_iomux dout */
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#define GPOUT_AON_CLK_32K_OUT			2
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#define GPOUT_AON_PTC0_PWM4			3
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#define GPOUT_AON_PTC0_PWM5			4
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#define GPOUT_AON_PTC0_PWM6			5
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#define GPOUT_AON_PTC0_PWM7			6
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#define GPOUT_AON_CLK_GCLK0			7
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#define GPOUT_AON_CLK_GCLK1			8
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#define GPOUT_AON_CLK_GCLK2			9
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/* sys_iomux doen */
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#define GPOEN_ENABLE				0
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#define GPOEN_DISABLE				1
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#define GPOEN_SYS_HDMI_CEC_SDA			2
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#define GPOEN_SYS_HDMI_DDC_SCL			3
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#define GPOEN_SYS_HDMI_DDC_SDA			4
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#define GPOEN_SYS_I2C0_CLK			5
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#define GPOEN_SYS_I2C0_DATA			6
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#define GPOEN_SYS_HIFI4_JTAG_TDO		7
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#define GPOEN_SYS_JTAG_TDO			8
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#define GPOEN_SYS_PWM0_CHANNEL0			9
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#define GPOEN_SYS_PWM0_CHANNEL1			10
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#define GPOEN_SYS_PWM0_CHANNEL2			11
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#define GPOEN_SYS_PWM0_CHANNEL3			12
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#define GPOEN_SYS_SPI0_NSSPCTL			13
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#define GPOEN_SYS_SPI0_NSSP			14
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#define GPOEN_SYS_TDM_SYNC			15
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#define GPOEN_SYS_TDM_TXD			16
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#define GPOEN_SYS_I2C1_CLK			17
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#define GPOEN_SYS_I2C1_DATA			18
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#define GPOEN_SYS_SDIO1_CMD			19
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#define GPOEN_SYS_SDIO1_DATA0			20
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#define GPOEN_SYS_SDIO1_DATA1			21
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#define GPOEN_SYS_SDIO1_DATA2			22
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#define GPOEN_SYS_SDIO1_DATA3			23
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#define GPOEN_SYS_SDIO1_DATA4			24
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#define GPOEN_SYS_SDIO1_DATA5			25
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#define GPOEN_SYS_SDIO1_DATA6			26
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#define GPOEN_SYS_SDIO1_DATA7			27
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#define GPOEN_SYS_SPI1_NSSPCTL			28
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#define GPOEN_SYS_SPI1_NSSP			29
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#define GPOEN_SYS_I2C2_CLK			30
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#define GPOEN_SYS_I2C2_DATA			31
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#define GPOEN_SYS_SPI2_NSSPCTL			32
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#define GPOEN_SYS_SPI2_NSSP			33
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#define GPOEN_SYS_I2C3_CLK			34
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#define GPOEN_SYS_I2C3_DATA			35
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#define GPOEN_SYS_SPI3_NSSPCTL			36
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#define GPOEN_SYS_SPI3_NSSP			37
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#define GPOEN_SYS_I2C4_CLK			38
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#define GPOEN_SYS_I2C4_DATA			39
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#define GPOEN_SYS_SPI4_NSSPCTL			40
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#define GPOEN_SYS_SPI4_NSSP			41
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#define GPOEN_SYS_I2C5_CLK			42
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#define GPOEN_SYS_I2C5_DATA			43
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#define GPOEN_SYS_SPI5_NSSPCTL			44
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#define GPOEN_SYS_SPI5_NSSP			45
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#define GPOEN_SYS_I2C6_CLK			46
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#define GPOEN_SYS_I2C6_DATA			47
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#define GPOEN_SYS_SPI6_NSSPCTL			48
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#define GPOEN_SYS_SPI6_NSSP			49
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/* aon_iomux doen */
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#define GPOEN_AON_PTC0_OE_N_4			2
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#define GPOEN_AON_PTC0_OE_N_5			3
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#define GPOEN_AON_PTC0_OE_N_6			4
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#define GPOEN_AON_PTC0_OE_N_7			5
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/* sys_iomux gin */
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#define GPI_NONE				255
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#define GPI_SYS_WAVE511_UART_RX			0
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#define GPI_SYS_CAN0_RXD			1
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#define GPI_SYS_USB_OVERCURRENT			2
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#define GPI_SYS_SPDIF				3
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#define GPI_SYS_JTAG_RST			4
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#define GPI_SYS_HDMI_CEC_SDA			5
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#define GPI_SYS_HDMI_DDC_SCL			6
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#define GPI_SYS_HDMI_DDC_SDA			7
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#define GPI_SYS_HDMI_HPD			8
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#define GPI_SYS_I2C0_CLK			9
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#define GPI_SYS_I2C0_DATA			10
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#define GPI_SYS_SDIO0_CD			11
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#define GPI_SYS_SDIO0_INT			12
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#define GPI_SYS_SDIO0_WP			13
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#define GPI_SYS_UART0_RX			14
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#define GPI_SYS_HIFI4_JTAG_TCK			15
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#define GPI_SYS_HIFI4_JTAG_TDI			16
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#define GPI_SYS_HIFI4_JTAG_TMS			17
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#define GPI_SYS_HIFI4_JTAG_RST			18
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#define GPI_SYS_JTAG_TDI			19
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#define GPI_SYS_JTAG_TMS			20
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#define GPI_SYS_PDM_DMIC0			21
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#define GPI_SYS_PDM_DMIC1			22
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#define GPI_SYS_I2SRX_SDIN0			23
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#define GPI_SYS_I2SRX_SDIN1			24
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#define GPI_SYS_I2SRX_SDIN2			25
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#define GPI_SYS_SPI0_CLK			26
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#define GPI_SYS_SPI0_FSS			27
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#define GPI_SYS_SPI0_RXD			28
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#define GPI_SYS_JTAG_TCK			29
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#define GPI_SYS_MCLK_EXT			30
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#define GPI_SYS_I2SRX_BCLK			31
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#define GPI_SYS_I2SRX_LRCK			32
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#define GPI_SYS_I2STX1_BCLK			33
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#define GPI_SYS_I2STX1_LRCK			34
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#define GPI_SYS_TDM_CLK				35
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#define GPI_SYS_TDM_RXD				36
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#define GPI_SYS_TDM_SYNC			37
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#define GPI_SYS_CAN1_RXD			38
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#define GPI_SYS_I2C1_CLK			39
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#define GPI_SYS_I2C1_DATA			40
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#define GPI_SYS_SDIO1_CD			41
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#define GPI_SYS_SDIO1_INT			42
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#define GPI_SYS_SDIO1_WP			43
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#define GPI_SYS_SDIO1_CMD			44
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#define GPI_SYS_SDIO1_DATA0			45
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#define GPI_SYS_SDIO1_DATA1			46
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#define GPI_SYS_SDIO1_DATA2			47
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#define GPI_SYS_SDIO1_DATA3			48
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#define GPI_SYS_SDIO1_DATA4			49
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#define GPI_SYS_SDIO1_DATA5			50
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#define GPI_SYS_SDIO1_DATA6			51
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#define GPI_SYS_SDIO1_DATA7			52
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#define GPI_SYS_SDIO1_STRB			53
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#define GPI_SYS_UART1_CTS			54
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#define GPI_SYS_UART1_RX			55
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#define GPI_SYS_SPI1_CLK			56
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#define GPI_SYS_SPI1_FSS			57
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#define GPI_SYS_SPI1_RXD			58
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#define GPI_SYS_I2C2_CLK			59
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#define GPI_SYS_I2C2_DATA			60
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#define GPI_SYS_UART2_CTS			61
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#define GPI_SYS_UART2_RX			62
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#define GPI_SYS_SPI2_CLK			63
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#define GPI_SYS_SPI2_FSS			64
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#define GPI_SYS_SPI2_RXD			65
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#define GPI_SYS_I2C3_CLK			66
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#define GPI_SYS_I2C3_DATA			67
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#define GPI_SYS_UART3_RX			68
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#define GPI_SYS_SPI3_CLK			69
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#define GPI_SYS_SPI3_FSS			70
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#define GPI_SYS_SPI3_RXD			71
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#define GPI_SYS_I2C4_CLK			72
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#define GPI_SYS_I2C4_DATA			73
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#define GPI_SYS_UART4_CTS			74
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#define GPI_SYS_UART4_RX			75
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#define GPI_SYS_SPI4_CLK			76
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#define GPI_SYS_SPI4_FSS			77
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#define GPI_SYS_SPI4_RXD			78
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#define GPI_SYS_I2C5_CLK			79
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#define GPI_SYS_I2C5_DATA			80
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#define GPI_SYS_UART5_CTS			81
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#define GPI_SYS_UART5_RX			82
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#define GPI_SYS_SPI5_CLK			83
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#define GPI_SYS_SPI5_FSS			84
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#define GPI_SYS_SPI5_RXD			85
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#define GPI_SYS_I2C6_CLK			86
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#define GPI_SYS_I2C6_DATA			87
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#define GPI_SYS_SPI6_CLK			88
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#define GPI_SYS_SPI6_FSS			89
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#define GPI_SYS_SPI6_RXD			90
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/* aon_iomux gin */
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#define GPI_AON_PMU_GPIO_WAKEUP_0		0
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#define GPI_AON_PMU_GPIO_WAKEUP_1		1
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#define GPI_AON_PMU_GPIO_WAKEUP_2		2
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#define GPI_AON_PMU_GPIO_WAKEUP_3		3
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#endif
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