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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/arch/riscv/crypto/ghash-riscv64-zvkg.S
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/* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */

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//

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// This file is dual-licensed, meaning that you can use it under your

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// choice of either of the following two licenses:

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//

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// Copyright 2023 The OpenSSL Project Authors. All Rights Reserved.

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//

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// Licensed under the Apache License 2.0 (the "License"). You can obtain

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// a copy in the file LICENSE in the source distribution or at

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// https://www.openssl.org/source/license.html

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//

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// or

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//

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// Copyright (c) 2023, Christoph Müllner <christoph.muellner@vrull.eu>

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// Copyright (c) 2023, Jerry Shih <jerry.shih@sifive.com>

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// Copyright 2024 Google LLC

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// All rights reserved.

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//

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// Redistribution and use in source and binary forms, with or without

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// modification, are permitted provided that the following conditions

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// are met:

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// 1. Redistributions of source code must retain the above copyright

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//    notice, this list of conditions and the following disclaimer.

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// 2. Redistributions in binary form must reproduce the above copyright

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//    notice, this list of conditions and the following disclaimer in the

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//    documentation and/or other materials provided with the distribution.

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//

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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS

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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR

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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT

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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,

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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT

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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,

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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY

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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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// The generated code of this file depends on the following RISC-V extensions:

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// - RV64I

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// - RISC-V Vector ('V') with VLEN >= 128

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// - RISC-V Vector GCM/GMAC extension ('Zvkg')

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#include <linux/linkage.h>

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.text

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.option arch, +zvkg

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#define ACCUMULATOR	a0

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#define KEY		a1

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#define DATA		a2

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#define LEN		a3

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// void ghash_zvkg(be128 *accumulator, const be128 *key, const u8 *data,

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//		   size_t len);

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//

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// |len| must be nonzero and a multiple of 16 (GHASH_BLOCK_SIZE).

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SYM_FUNC_START(ghash_zvkg)

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	vsetivli	zero, 4, e32, m1, ta, ma

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	vle32.v		v1, (ACCUMULATOR)

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	vle32.v		v2, (KEY)

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.Lnext_block:

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	vle32.v		v3, (DATA)

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	vghsh.vv	v1, v2, v3

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	addi		DATA, DATA, 16

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	addi		LEN, LEN, -16

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	bnez		LEN, .Lnext_block

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	vse32.v		v1, (ACCUMULATOR)

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	ret

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SYM_FUNC_END(ghash_zvkg)

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