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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/arch/riscv/crypto/sm3-riscv64-glue.c
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* SM3 using the RISC-V vector crypto extensions
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*
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* Copyright (C) 2023 VRULL GmbH
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* Author: Heiko Stuebner <[email protected]>
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*
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* Copyright (C) 2023 SiFive, Inc.
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* Author: Jerry Shih <[email protected]>
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*/
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#include <asm/simd.h>
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#include <asm/vector.h>
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#include <crypto/internal/hash.h>
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#include <crypto/internal/simd.h>
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#include <crypto/sm3.h>
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#include <crypto/sm3_base.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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/*
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* Note: the asm function only uses the 'state' field of struct sm3_state.
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* It is assumed to be the first field.
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*/
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asmlinkage void sm3_transform_zvksh_zvkb(
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struct sm3_state *state, const u8 *data, int num_blocks);
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static void sm3_block(struct sm3_state *state, const u8 *data,
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int num_blocks)
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{
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/*
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* Ensure struct sm3_state begins directly with the SM3
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* 256-bit internal state, as this is what the asm function expects.
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*/
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BUILD_BUG_ON(offsetof(struct sm3_state, state) != 0);
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if (crypto_simd_usable()) {
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kernel_vector_begin();
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sm3_transform_zvksh_zvkb(state, data, num_blocks);
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kernel_vector_end();
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} else {
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sm3_block_generic(state, data, num_blocks);
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}
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}
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static int riscv64_sm3_update(struct shash_desc *desc, const u8 *data,
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unsigned int len)
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{
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return sm3_base_do_update_blocks(desc, data, len, sm3_block);
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}
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static int riscv64_sm3_finup(struct shash_desc *desc, const u8 *data,
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unsigned int len, u8 *out)
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{
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sm3_base_do_finup(desc, data, len, sm3_block);
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return sm3_base_finish(desc, out);
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}
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static struct shash_alg riscv64_sm3_alg = {
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.init = sm3_base_init,
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.update = riscv64_sm3_update,
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.finup = riscv64_sm3_finup,
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.descsize = SM3_STATE_SIZE,
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.digestsize = SM3_DIGEST_SIZE,
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.base = {
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.cra_blocksize = SM3_BLOCK_SIZE,
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.cra_flags = CRYPTO_AHASH_ALG_BLOCK_ONLY |
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CRYPTO_AHASH_ALG_FINUP_MAX,
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.cra_priority = 300,
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.cra_name = "sm3",
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.cra_driver_name = "sm3-riscv64-zvksh-zvkb",
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.cra_module = THIS_MODULE,
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},
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};
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static int __init riscv64_sm3_mod_init(void)
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{
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if (riscv_isa_extension_available(NULL, ZVKSH) &&
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riscv_isa_extension_available(NULL, ZVKB) &&
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riscv_vector_vlen() >= 128)
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return crypto_register_shash(&riscv64_sm3_alg);
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return -ENODEV;
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}
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static void __exit riscv64_sm3_mod_exit(void)
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{
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crypto_unregister_shash(&riscv64_sm3_alg);
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}
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module_init(riscv64_sm3_mod_init);
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module_exit(riscv64_sm3_mod_exit);
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MODULE_DESCRIPTION("SM3 (RISC-V accelerated)");
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MODULE_AUTHOR("Heiko Stuebner <[email protected]>");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_CRYPTO("sm3");
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