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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/arch/riscv/kvm/vcpu_sbi_v01.c
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// SPDX-License-Identifier: GPL-2.0

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/*

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 * Copyright (c) 2021 Western Digital Corporation or its affiliates.

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 *

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 * Authors:

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 *     Atish Patra <[email protected]>

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 */

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#include <linux/errno.h>

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#include <linux/err.h>

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#include <linux/kvm_host.h>

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#include <asm/sbi.h>

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#include <asm/kvm_vcpu_timer.h>

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#include <asm/kvm_vcpu_sbi.h>

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static int kvm_sbi_ext_v01_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,

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				   struct kvm_vcpu_sbi_return *retdata)

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{

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	ulong hmask;

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	int i, ret = 0;

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	u64 next_cycle;

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	struct kvm_vcpu *rvcpu;

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	struct kvm *kvm = vcpu->kvm;

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	struct kvm_cpu_context *cp = &vcpu->arch.guest_context;

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	struct kvm_cpu_trap *utrap = retdata->utrap;

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	unsigned long vmid;

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	switch (cp->a7) {

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	case SBI_EXT_0_1_CONSOLE_GETCHAR:

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	case SBI_EXT_0_1_CONSOLE_PUTCHAR:

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		/*

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		 * The CONSOLE_GETCHAR/CONSOLE_PUTCHAR SBI calls cannot be

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		 * handled in kernel so we forward these to user-space

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		 */

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		kvm_riscv_vcpu_sbi_forward(vcpu, run);

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		retdata->uexit = true;

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		break;

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	case SBI_EXT_0_1_SET_TIMER:

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#if __riscv_xlen == 32

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		next_cycle = ((u64)cp->a1 << 32) | (u64)cp->a0;

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#else

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		next_cycle = (u64)cp->a0;

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#endif

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		ret = kvm_riscv_vcpu_timer_next_event(vcpu, next_cycle);

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		break;

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	case SBI_EXT_0_1_CLEAR_IPI:

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		ret = kvm_riscv_vcpu_unset_interrupt(vcpu, IRQ_VS_SOFT);

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		break;

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	case SBI_EXT_0_1_SEND_IPI:

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		if (cp->a0)

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			hmask = kvm_riscv_vcpu_unpriv_read(vcpu, false, cp->a0, utrap);

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		else

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			hmask = (1UL << atomic_read(&kvm->online_vcpus)) - 1;

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		if (utrap->scause)

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			break;

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		for_each_set_bit(i, &hmask, BITS_PER_LONG) {

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			rvcpu = kvm_get_vcpu_by_id(vcpu->kvm, i);

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			ret = kvm_riscv_vcpu_set_interrupt(rvcpu, IRQ_VS_SOFT);

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			if (ret < 0)

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				break;

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		}

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		break;

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	case SBI_EXT_0_1_SHUTDOWN:

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		kvm_riscv_vcpu_sbi_system_reset(vcpu, run,

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						KVM_SYSTEM_EVENT_SHUTDOWN, 0);

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		retdata->uexit = true;

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		break;

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	case SBI_EXT_0_1_REMOTE_FENCE_I:

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	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:

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	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:

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		if (cp->a0)

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			hmask = kvm_riscv_vcpu_unpriv_read(vcpu, false, cp->a0, utrap);

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		else

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			hmask = (1UL << atomic_read(&kvm->online_vcpus)) - 1;

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		if (utrap->scause)

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			break;

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		if (cp->a7 == SBI_EXT_0_1_REMOTE_FENCE_I)

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			kvm_riscv_fence_i(vcpu->kvm, 0, hmask);

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		else if (cp->a7 == SBI_EXT_0_1_REMOTE_SFENCE_VMA) {

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			vmid = READ_ONCE(vcpu->kvm->arch.vmid.vmid);

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			if (cp->a1 == 0 && cp->a2 == 0)

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				kvm_riscv_hfence_vvma_all(vcpu->kvm, 0, hmask, vmid);

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			else

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				kvm_riscv_hfence_vvma_gva(vcpu->kvm, 0, hmask, cp->a1,

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							  cp->a2, PAGE_SHIFT, vmid);

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		} else {

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			vmid = READ_ONCE(vcpu->kvm->arch.vmid.vmid);

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			if (cp->a1 == 0 && cp->a2 == 0)

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				kvm_riscv_hfence_vvma_asid_all(vcpu->kvm, 0, hmask,

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							       cp->a3, vmid);

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			else

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				kvm_riscv_hfence_vvma_asid_gva(vcpu->kvm, 0, hmask,

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							       cp->a1, cp->a2, PAGE_SHIFT,

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							       cp->a3, vmid);

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		}

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		break;

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	default:

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		retdata->err_val = SBI_ERR_NOT_SUPPORTED;

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		break;

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	}

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	return ret;

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}

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const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_v01 = {

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	.extid_start = SBI_EXT_0_1_SET_TIMER,

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	.extid_end = SBI_EXT_0_1_SHUTDOWN,

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	.handler = kvm_sbi_ext_v01_handler,

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};

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