#ifndef _S390_BITOPS_H
#define _S390_BITOPS_H
#ifndef _LINUX_BITOPS_H
#error only <linux/bitops.h> can be included directly
#endif
#include <linux/typecheck.h>
#include <linux/compiler.h>
#include <linux/types.h>
#include <asm/asm.h>
#define arch___set_bit generic___set_bit
#define arch___clear_bit generic___clear_bit
#define arch___change_bit generic___change_bit
#define arch___test_and_set_bit generic___test_and_set_bit
#define arch___test_and_clear_bit generic___test_and_clear_bit
#define arch___test_and_change_bit generic___test_and_change_bit
#define arch_test_bit_acquire generic_test_bit_acquire
static __always_inline bool arch_test_bit(unsigned long nr, const volatile unsigned long *ptr)
{
#ifdef __HAVE_ASM_FLAG_OUTPUTS__
const volatile unsigned char *addr;
unsigned long mask;
int cc;
if (!IS_ENABLED(CONFIG_PROFILE_ALL_BRANCHES) && __builtin_constant_p(nr)) {
addr = (const volatile unsigned char *)ptr;
addr += (nr ^ (BITS_PER_LONG - BITS_PER_BYTE)) / BITS_PER_BYTE;
mask = 1UL << (nr & (BITS_PER_BYTE - 1));
asm volatile(
" tm %[addr],%[mask]\n"
: "=@cc" (cc)
: [addr] "Q" (*addr), [mask] "I" (mask)
);
return cc == 3;
}
#endif
return generic_test_bit(nr, ptr);
}
#include <asm-generic/bitops/atomic.h>
#include <asm-generic/bitops/non-instrumented-non-atomic.h>
#include <asm-generic/bitops/lock.h>
unsigned long find_first_bit_inv(const unsigned long *addr, unsigned long size);
unsigned long find_next_bit_inv(const unsigned long *addr, unsigned long size,
unsigned long offset);
#define for_each_set_bit_inv(bit, addr, size) \
for ((bit) = find_first_bit_inv((addr), (size)); \
(bit) < (size); \
(bit) = find_next_bit_inv((addr), (size), (bit) + 1))
static inline void set_bit_inv(unsigned long nr, volatile unsigned long *ptr)
{
return set_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}
static inline void clear_bit_inv(unsigned long nr, volatile unsigned long *ptr)
{
return clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}
static inline bool test_and_clear_bit_inv(unsigned long nr,
volatile unsigned long *ptr)
{
return test_and_clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}
static inline void __set_bit_inv(unsigned long nr, volatile unsigned long *ptr)
{
return __set_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}
static inline void __clear_bit_inv(unsigned long nr, volatile unsigned long *ptr)
{
return __clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}
static inline bool test_bit_inv(unsigned long nr,
const volatile unsigned long *ptr)
{
return test_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}
static inline unsigned char __flogr(unsigned long word)
{
if (__builtin_constant_p(word)) {
unsigned long bit = 0;
if (!word)
return 64;
if (!(word & 0xffffffff00000000UL)) {
word <<= 32;
bit += 32;
}
if (!(word & 0xffff000000000000UL)) {
word <<= 16;
bit += 16;
}
if (!(word & 0xff00000000000000UL)) {
word <<= 8;
bit += 8;
}
if (!(word & 0xf000000000000000UL)) {
word <<= 4;
bit += 4;
}
if (!(word & 0xc000000000000000UL)) {
word <<= 2;
bit += 2;
}
if (!(word & 0x8000000000000000UL)) {
word <<= 1;
bit += 1;
}
return bit;
} else {
union register_pair rp;
rp.even = word;
asm volatile(
" flogr %[rp],%[rp]\n"
: [rp] "+d" (rp.pair) : : "cc");
return rp.even;
}
}
static inline unsigned long __ffs(unsigned long word)
{
return __flogr(-word & word) ^ (BITS_PER_LONG - 1);
}
static inline int ffs(int word)
{
unsigned long mask = 2 * BITS_PER_LONG - 1;
unsigned int val = (unsigned int)word;
return (1 + (__flogr(-val & val) ^ (BITS_PER_LONG - 1))) & mask;
}
static inline unsigned long __fls(unsigned long word)
{
return __flogr(word) ^ (BITS_PER_LONG - 1);
}
static inline int fls64(unsigned long word)
{
unsigned long mask = 2 * BITS_PER_LONG - 1;
return (1 + (__flogr(word) ^ (BITS_PER_LONG - 1))) & mask;
}
static inline int fls(unsigned int word)
{
return fls64(word);
}
#include <asm/arch_hweight.h>
#include <asm-generic/bitops/const_hweight.h>
#include <asm-generic/bitops/ffz.h>
#include <asm-generic/bitops/sched.h>
#include <asm-generic/bitops/le.h>
#include <asm-generic/bitops/ext2-atomic-setbit.h>
#endif