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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/arch/s390/kernel/cache.c
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Extract CPU cache information and expose them via sysfs.
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*
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* Copyright IBM Corp. 2012
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*/
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#include <linux/seq_file.h>
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#include <linux/cpu.h>
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#include <linux/cacheinfo.h>
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#include <asm/facility.h>
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enum {
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CACHE_SCOPE_NOTEXISTS,
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CACHE_SCOPE_PRIVATE,
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CACHE_SCOPE_SHARED,
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CACHE_SCOPE_RESERVED,
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};
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enum {
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CTYPE_SEPARATE,
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CTYPE_DATA,
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CTYPE_INSTRUCTION,
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CTYPE_UNIFIED,
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};
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enum {
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EXTRACT_TOPOLOGY,
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EXTRACT_LINE_SIZE,
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EXTRACT_SIZE,
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EXTRACT_ASSOCIATIVITY,
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};
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enum {
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CACHE_TI_UNIFIED = 0,
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CACHE_TI_DATA = 0,
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CACHE_TI_INSTRUCTION,
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};
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struct cache_info {
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unsigned char : 4;
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unsigned char scope : 2;
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unsigned char type : 2;
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};
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#define CACHE_MAX_LEVEL 8
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union cache_topology {
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struct cache_info ci[CACHE_MAX_LEVEL];
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unsigned long raw;
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};
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static const char * const cache_type_string[] = {
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"",
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"Instruction",
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"Data",
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"",
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"Unified",
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};
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static const enum cache_type cache_type_map[] = {
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[CTYPE_SEPARATE] = CACHE_TYPE_SEPARATE,
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[CTYPE_DATA] = CACHE_TYPE_DATA,
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[CTYPE_INSTRUCTION] = CACHE_TYPE_INST,
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[CTYPE_UNIFIED] = CACHE_TYPE_UNIFIED,
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};
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void show_cacheinfo(struct seq_file *m)
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{
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struct cpu_cacheinfo *this_cpu_ci;
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struct cacheinfo *cache;
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int idx;
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this_cpu_ci = get_cpu_cacheinfo(cpumask_any(cpu_online_mask));
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for (idx = 0; idx < this_cpu_ci->num_leaves; idx++) {
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cache = this_cpu_ci->info_list + idx;
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seq_printf(m, "cache%-11d: ", idx);
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seq_printf(m, "level=%d ", cache->level);
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seq_printf(m, "type=%s ", cache_type_string[cache->type]);
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seq_printf(m, "scope=%s ",
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cache->disable_sysfs ? "Shared" : "Private");
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seq_printf(m, "size=%dK ", cache->size >> 10);
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seq_printf(m, "line_size=%u ", cache->coherency_line_size);
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seq_printf(m, "associativity=%d", cache->ways_of_associativity);
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seq_puts(m, "\n");
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}
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}
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static inline enum cache_type get_cache_type(struct cache_info *ci, int level)
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{
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if (level >= CACHE_MAX_LEVEL)
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return CACHE_TYPE_NOCACHE;
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ci += level;
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if (ci->scope != CACHE_SCOPE_SHARED && ci->scope != CACHE_SCOPE_PRIVATE)
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return CACHE_TYPE_NOCACHE;
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return cache_type_map[ci->type];
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}
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static inline unsigned long ecag(int ai, int li, int ti)
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{
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return __ecag(ECAG_CACHE_ATTRIBUTE, ai << 4 | li << 1 | ti);
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}
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static void ci_leaf_init(struct cacheinfo *this_leaf, int private,
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enum cache_type type, unsigned int level, int cpu)
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{
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int ti, num_sets;
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if (type == CACHE_TYPE_INST)
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ti = CACHE_TI_INSTRUCTION;
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else
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ti = CACHE_TI_UNIFIED;
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this_leaf->level = level + 1;
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this_leaf->type = type;
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this_leaf->coherency_line_size = ecag(EXTRACT_LINE_SIZE, level, ti);
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this_leaf->ways_of_associativity = ecag(EXTRACT_ASSOCIATIVITY, level, ti);
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this_leaf->size = ecag(EXTRACT_SIZE, level, ti);
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num_sets = this_leaf->size / this_leaf->coherency_line_size;
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num_sets /= this_leaf->ways_of_associativity;
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this_leaf->number_of_sets = num_sets;
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cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
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if (!private)
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this_leaf->disable_sysfs = true;
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}
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int init_cache_level(unsigned int cpu)
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{
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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unsigned int level = 0, leaves = 0;
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union cache_topology ct;
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enum cache_type ctype;
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if (!this_cpu_ci)
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return -EINVAL;
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ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0);
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do {
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ctype = get_cache_type(&ct.ci[0], level);
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if (ctype == CACHE_TYPE_NOCACHE)
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break;
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/* Separate instruction and data caches */
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leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1;
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} while (++level < CACHE_MAX_LEVEL);
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this_cpu_ci->num_levels = level;
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this_cpu_ci->num_leaves = leaves;
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return 0;
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}
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int populate_cache_leaves(unsigned int cpu)
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{
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struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
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struct cacheinfo *this_leaf = this_cpu_ci->info_list;
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unsigned int level, idx, pvt;
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union cache_topology ct;
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enum cache_type ctype;
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ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0);
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for (idx = 0, level = 0; level < this_cpu_ci->num_levels &&
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idx < this_cpu_ci->num_leaves; idx++, level++) {
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if (!this_leaf)
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return -EINVAL;
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pvt = (ct.ci[level].scope == CACHE_SCOPE_PRIVATE) ? 1 : 0;
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ctype = get_cache_type(&ct.ci[0], level);
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if (ctype == CACHE_TYPE_SEPARATE) {
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ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_DATA, level, cpu);
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ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_INST, level, cpu);
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} else {
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ci_leaf_init(this_leaf++, pvt, ctype, level, cpu);
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}
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}
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this_cpu_ci->cpu_map_populated = true;
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return 0;
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}
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