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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/arch/s390/kvm/sigp.c
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// SPDX-License-Identifier: GPL-2.0
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/*
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* handling interprocessor communication
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*
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* Copyright IBM Corp. 2008, 2013
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*
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* Author(s): Carsten Otte <[email protected]>
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* Christian Borntraeger <[email protected]>
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* Christian Ehrhardt <[email protected]>
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*/
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/slab.h>
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#include <asm/sigp.h>
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#include "gaccess.h"
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#include "kvm-s390.h"
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#include "trace.h"
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static int __sigp_sense(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu,
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u64 *reg)
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{
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const bool stopped = kvm_s390_test_cpuflags(dst_vcpu, CPUSTAT_STOPPED);
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int rc;
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int ext_call_pending;
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ext_call_pending = kvm_s390_ext_call_pending(dst_vcpu);
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if (!stopped && !ext_call_pending)
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rc = SIGP_CC_ORDER_CODE_ACCEPTED;
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else {
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*reg &= 0xffffffff00000000UL;
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if (ext_call_pending)
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*reg |= SIGP_STATUS_EXT_CALL_PENDING;
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if (stopped)
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*reg |= SIGP_STATUS_STOPPED;
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rc = SIGP_CC_STATUS_STORED;
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}
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VCPU_EVENT(vcpu, 4, "sensed status of cpu %x rc %x", dst_vcpu->vcpu_id,
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rc);
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return rc;
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}
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static int __inject_sigp_emergency(struct kvm_vcpu *vcpu,
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struct kvm_vcpu *dst_vcpu)
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{
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struct kvm_s390_irq irq = {
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.type = KVM_S390_INT_EMERGENCY,
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.u.emerg.code = vcpu->vcpu_id,
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};
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int rc = 0;
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rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
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if (!rc)
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VCPU_EVENT(vcpu, 4, "sent sigp emerg to cpu %x",
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dst_vcpu->vcpu_id);
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return rc ? rc : SIGP_CC_ORDER_CODE_ACCEPTED;
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}
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static int __sigp_emergency(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu)
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{
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return __inject_sigp_emergency(vcpu, dst_vcpu);
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}
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static int __sigp_conditional_emergency(struct kvm_vcpu *vcpu,
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struct kvm_vcpu *dst_vcpu,
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u16 asn, u64 *reg)
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{
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const u64 psw_int_mask = PSW_MASK_IO | PSW_MASK_EXT;
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u16 p_asn, s_asn;
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psw_t *psw;
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bool idle;
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idle = is_vcpu_idle(vcpu);
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psw = &dst_vcpu->arch.sie_block->gpsw;
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p_asn = dst_vcpu->arch.sie_block->gcr[4] & 0xffff; /* Primary ASN */
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s_asn = dst_vcpu->arch.sie_block->gcr[3] & 0xffff; /* Secondary ASN */
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/* Inject the emergency signal? */
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if (!is_vcpu_stopped(vcpu)
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|| (psw->mask & psw_int_mask) != psw_int_mask
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|| (idle && psw->addr != 0)
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|| (!idle && (asn == p_asn || asn == s_asn))) {
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return __inject_sigp_emergency(vcpu, dst_vcpu);
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} else {
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*reg &= 0xffffffff00000000UL;
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*reg |= SIGP_STATUS_INCORRECT_STATE;
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return SIGP_CC_STATUS_STORED;
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}
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}
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static int __sigp_external_call(struct kvm_vcpu *vcpu,
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struct kvm_vcpu *dst_vcpu, u64 *reg)
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{
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struct kvm_s390_irq irq = {
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.type = KVM_S390_INT_EXTERNAL_CALL,
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.u.extcall.code = vcpu->vcpu_id,
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};
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int rc;
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rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
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if (rc == -EBUSY) {
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*reg &= 0xffffffff00000000UL;
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*reg |= SIGP_STATUS_EXT_CALL_PENDING;
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return SIGP_CC_STATUS_STORED;
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} else if (rc == 0) {
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VCPU_EVENT(vcpu, 4, "sent sigp ext call to cpu %x",
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dst_vcpu->vcpu_id);
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}
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return rc ? rc : SIGP_CC_ORDER_CODE_ACCEPTED;
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}
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static int __sigp_stop(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu)
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{
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struct kvm_s390_irq irq = {
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.type = KVM_S390_SIGP_STOP,
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};
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int rc;
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rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
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if (rc == -EBUSY)
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rc = SIGP_CC_BUSY;
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else if (rc == 0)
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VCPU_EVENT(vcpu, 4, "sent sigp stop to cpu %x",
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dst_vcpu->vcpu_id);
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return rc;
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}
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static int __sigp_stop_and_store_status(struct kvm_vcpu *vcpu,
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struct kvm_vcpu *dst_vcpu, u64 *reg)
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{
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struct kvm_s390_irq irq = {
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.type = KVM_S390_SIGP_STOP,
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.u.stop.flags = KVM_S390_STOP_FLAG_STORE_STATUS,
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};
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int rc;
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rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
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if (rc == -EBUSY)
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rc = SIGP_CC_BUSY;
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else if (rc == 0)
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VCPU_EVENT(vcpu, 4, "sent sigp stop and store status to cpu %x",
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dst_vcpu->vcpu_id);
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return rc;
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}
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static int __sigp_set_arch(struct kvm_vcpu *vcpu, u32 parameter,
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u64 *status_reg)
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{
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*status_reg &= 0xffffffff00000000UL;
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/* Reject set arch order, with czam we're always in z/Arch mode. */
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*status_reg |= SIGP_STATUS_INVALID_PARAMETER;
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return SIGP_CC_STATUS_STORED;
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}
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static int __sigp_set_prefix(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu,
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u32 address, u64 *reg)
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{
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struct kvm_s390_irq irq = {
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.type = KVM_S390_SIGP_SET_PREFIX,
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.u.prefix.address = address & 0x7fffe000u,
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};
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int rc;
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/*
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* Make sure the new value is valid memory. We only need to check the
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* first page, since address is 8k aligned and memory pieces are always
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* at least 1MB aligned and have at least a size of 1MB.
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*/
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if (!kvm_is_gpa_in_memslot(vcpu->kvm, irq.u.prefix.address)) {
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*reg &= 0xffffffff00000000UL;
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*reg |= SIGP_STATUS_INVALID_PARAMETER;
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return SIGP_CC_STATUS_STORED;
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}
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rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
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if (rc == -EBUSY) {
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*reg &= 0xffffffff00000000UL;
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*reg |= SIGP_STATUS_INCORRECT_STATE;
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return SIGP_CC_STATUS_STORED;
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}
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return rc;
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}
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static int __sigp_store_status_at_addr(struct kvm_vcpu *vcpu,
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struct kvm_vcpu *dst_vcpu,
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u32 addr, u64 *reg)
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{
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int rc;
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if (!kvm_s390_test_cpuflags(dst_vcpu, CPUSTAT_STOPPED)) {
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*reg &= 0xffffffff00000000UL;
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*reg |= SIGP_STATUS_INCORRECT_STATE;
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return SIGP_CC_STATUS_STORED;
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}
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addr &= 0x7ffffe00;
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rc = kvm_s390_store_status_unloaded(dst_vcpu, addr);
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if (rc == -EFAULT) {
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*reg &= 0xffffffff00000000UL;
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*reg |= SIGP_STATUS_INVALID_PARAMETER;
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rc = SIGP_CC_STATUS_STORED;
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}
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return rc;
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}
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static int __sigp_sense_running(struct kvm_vcpu *vcpu,
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struct kvm_vcpu *dst_vcpu, u64 *reg)
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{
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int rc;
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if (!test_kvm_facility(vcpu->kvm, 9)) {
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*reg &= 0xffffffff00000000UL;
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*reg |= SIGP_STATUS_INVALID_ORDER;
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return SIGP_CC_STATUS_STORED;
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}
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if (kvm_s390_test_cpuflags(dst_vcpu, CPUSTAT_RUNNING)) {
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/* running */
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rc = SIGP_CC_ORDER_CODE_ACCEPTED;
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} else {
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/* not running */
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*reg &= 0xffffffff00000000UL;
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*reg |= SIGP_STATUS_NOT_RUNNING;
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rc = SIGP_CC_STATUS_STORED;
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}
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VCPU_EVENT(vcpu, 4, "sensed running status of cpu %x rc %x",
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dst_vcpu->vcpu_id, rc);
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return rc;
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}
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static int __prepare_sigp_re_start(struct kvm_vcpu *vcpu,
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struct kvm_vcpu *dst_vcpu, u8 order_code)
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{
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struct kvm_s390_local_interrupt *li = &dst_vcpu->arch.local_int;
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/* handle (RE)START in user space */
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int rc = -EOPNOTSUPP;
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/* make sure we don't race with STOP irq injection */
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spin_lock(&li->lock);
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if (kvm_s390_is_stop_irq_pending(dst_vcpu))
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rc = SIGP_CC_BUSY;
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spin_unlock(&li->lock);
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return rc;
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}
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static int __prepare_sigp_cpu_reset(struct kvm_vcpu *vcpu,
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struct kvm_vcpu *dst_vcpu, u8 order_code)
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{
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/* handle (INITIAL) CPU RESET in user space */
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return -EOPNOTSUPP;
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}
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static int __prepare_sigp_unknown(struct kvm_vcpu *vcpu,
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struct kvm_vcpu *dst_vcpu)
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{
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/* handle unknown orders in user space */
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return -EOPNOTSUPP;
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}
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static int handle_sigp_dst(struct kvm_vcpu *vcpu, u8 order_code,
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u16 cpu_addr, u32 parameter, u64 *status_reg)
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{
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int rc;
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struct kvm_vcpu *dst_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, cpu_addr);
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276
if (!dst_vcpu)
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return SIGP_CC_NOT_OPERATIONAL;
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/*
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* SIGP RESTART, SIGP STOP, and SIGP STOP AND STORE STATUS orders
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* are processed asynchronously. Until the affected VCPU finishes
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* its work and calls back into KVM to clear the (RESTART or STOP)
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* interrupt, we need to return any new non-reset orders "busy".
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*
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* This is important because a single VCPU could issue:
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* 1) SIGP STOP $DESTINATION
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* 2) SIGP SENSE $DESTINATION
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*
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* If the SIGP SENSE would not be rejected as "busy", it could
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* return an incorrect answer as to whether the VCPU is STOPPED
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* or OPERATING.
292
*/
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if (order_code != SIGP_INITIAL_CPU_RESET &&
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order_code != SIGP_CPU_RESET) {
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/*
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* Lockless check. Both SIGP STOP and SIGP (RE)START
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* properly synchronize everything while processing
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* their orders, while the guest cannot observe a
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* difference when issuing other orders from two
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* different VCPUs.
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*/
302
if (kvm_s390_is_stop_irq_pending(dst_vcpu) ||
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kvm_s390_is_restart_irq_pending(dst_vcpu))
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return SIGP_CC_BUSY;
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}
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switch (order_code) {
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case SIGP_SENSE:
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vcpu->stat.instruction_sigp_sense++;
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rc = __sigp_sense(vcpu, dst_vcpu, status_reg);
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break;
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case SIGP_EXTERNAL_CALL:
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vcpu->stat.instruction_sigp_external_call++;
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rc = __sigp_external_call(vcpu, dst_vcpu, status_reg);
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break;
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case SIGP_EMERGENCY_SIGNAL:
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vcpu->stat.instruction_sigp_emergency++;
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rc = __sigp_emergency(vcpu, dst_vcpu);
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break;
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case SIGP_STOP:
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vcpu->stat.instruction_sigp_stop++;
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rc = __sigp_stop(vcpu, dst_vcpu);
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break;
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case SIGP_STOP_AND_STORE_STATUS:
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vcpu->stat.instruction_sigp_stop_store_status++;
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rc = __sigp_stop_and_store_status(vcpu, dst_vcpu, status_reg);
327
break;
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case SIGP_STORE_STATUS_AT_ADDRESS:
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vcpu->stat.instruction_sigp_store_status++;
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rc = __sigp_store_status_at_addr(vcpu, dst_vcpu, parameter,
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status_reg);
332
break;
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case SIGP_SET_PREFIX:
334
vcpu->stat.instruction_sigp_prefix++;
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rc = __sigp_set_prefix(vcpu, dst_vcpu, parameter, status_reg);
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break;
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case SIGP_COND_EMERGENCY_SIGNAL:
338
vcpu->stat.instruction_sigp_cond_emergency++;
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rc = __sigp_conditional_emergency(vcpu, dst_vcpu, parameter,
340
status_reg);
341
break;
342
case SIGP_SENSE_RUNNING:
343
vcpu->stat.instruction_sigp_sense_running++;
344
rc = __sigp_sense_running(vcpu, dst_vcpu, status_reg);
345
break;
346
case SIGP_START:
347
vcpu->stat.instruction_sigp_start++;
348
rc = __prepare_sigp_re_start(vcpu, dst_vcpu, order_code);
349
break;
350
case SIGP_RESTART:
351
vcpu->stat.instruction_sigp_restart++;
352
rc = __prepare_sigp_re_start(vcpu, dst_vcpu, order_code);
353
break;
354
case SIGP_INITIAL_CPU_RESET:
355
vcpu->stat.instruction_sigp_init_cpu_reset++;
356
rc = __prepare_sigp_cpu_reset(vcpu, dst_vcpu, order_code);
357
break;
358
case SIGP_CPU_RESET:
359
vcpu->stat.instruction_sigp_cpu_reset++;
360
rc = __prepare_sigp_cpu_reset(vcpu, dst_vcpu, order_code);
361
break;
362
default:
363
vcpu->stat.instruction_sigp_unknown++;
364
rc = __prepare_sigp_unknown(vcpu, dst_vcpu);
365
}
366
367
if (rc == -EOPNOTSUPP)
368
VCPU_EVENT(vcpu, 4,
369
"sigp order %u -> cpu %x: handled in user space",
370
order_code, dst_vcpu->vcpu_id);
371
372
return rc;
373
}
374
375
static int handle_sigp_order_in_user_space(struct kvm_vcpu *vcpu, u8 order_code,
376
u16 cpu_addr)
377
{
378
if (!vcpu->kvm->arch.user_sigp)
379
return 0;
380
381
switch (order_code) {
382
case SIGP_SENSE:
383
case SIGP_EXTERNAL_CALL:
384
case SIGP_EMERGENCY_SIGNAL:
385
case SIGP_COND_EMERGENCY_SIGNAL:
386
case SIGP_SENSE_RUNNING:
387
return 0;
388
/* update counters as we're directly dropping to user space */
389
case SIGP_STOP:
390
vcpu->stat.instruction_sigp_stop++;
391
break;
392
case SIGP_STOP_AND_STORE_STATUS:
393
vcpu->stat.instruction_sigp_stop_store_status++;
394
break;
395
case SIGP_STORE_STATUS_AT_ADDRESS:
396
vcpu->stat.instruction_sigp_store_status++;
397
break;
398
case SIGP_STORE_ADDITIONAL_STATUS:
399
vcpu->stat.instruction_sigp_store_adtl_status++;
400
break;
401
case SIGP_SET_PREFIX:
402
vcpu->stat.instruction_sigp_prefix++;
403
break;
404
case SIGP_START:
405
vcpu->stat.instruction_sigp_start++;
406
break;
407
case SIGP_RESTART:
408
vcpu->stat.instruction_sigp_restart++;
409
break;
410
case SIGP_INITIAL_CPU_RESET:
411
vcpu->stat.instruction_sigp_init_cpu_reset++;
412
break;
413
case SIGP_CPU_RESET:
414
vcpu->stat.instruction_sigp_cpu_reset++;
415
break;
416
default:
417
vcpu->stat.instruction_sigp_unknown++;
418
}
419
VCPU_EVENT(vcpu, 3, "SIGP: order %u for CPU %d handled in userspace",
420
order_code, cpu_addr);
421
422
return 1;
423
}
424
425
int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu)
426
{
427
int r1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
428
int r3 = vcpu->arch.sie_block->ipa & 0x000f;
429
u32 parameter;
430
u16 cpu_addr = vcpu->run->s.regs.gprs[r3];
431
u8 order_code;
432
int rc;
433
434
/* sigp in userspace can exit */
435
if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
436
return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
437
438
order_code = kvm_s390_get_base_disp_rs(vcpu, NULL);
439
if (handle_sigp_order_in_user_space(vcpu, order_code, cpu_addr))
440
return -EOPNOTSUPP;
441
442
if (r1 % 2)
443
parameter = vcpu->run->s.regs.gprs[r1];
444
else
445
parameter = vcpu->run->s.regs.gprs[r1 + 1];
446
447
trace_kvm_s390_handle_sigp(vcpu, order_code, cpu_addr, parameter);
448
switch (order_code) {
449
case SIGP_SET_ARCHITECTURE:
450
vcpu->stat.instruction_sigp_arch++;
451
rc = __sigp_set_arch(vcpu, parameter,
452
&vcpu->run->s.regs.gprs[r1]);
453
break;
454
default:
455
rc = handle_sigp_dst(vcpu, order_code, cpu_addr,
456
parameter,
457
&vcpu->run->s.regs.gprs[r1]);
458
}
459
460
if (rc < 0)
461
return rc;
462
463
kvm_s390_set_psw_cc(vcpu, rc);
464
return 0;
465
}
466
467
/*
468
* Handle SIGP partial execution interception.
469
*
470
* This interception will occur at the source cpu when a source cpu sends an
471
* external call to a target cpu and the target cpu has the WAIT bit set in
472
* its cpuflags. Interception will occur after the interrupt indicator bits at
473
* the target cpu have been set. All error cases will lead to instruction
474
* interception, therefore nothing is to be checked or prepared.
475
*/
476
int kvm_s390_handle_sigp_pei(struct kvm_vcpu *vcpu)
477
{
478
int r3 = vcpu->arch.sie_block->ipa & 0x000f;
479
u16 cpu_addr = vcpu->run->s.regs.gprs[r3];
480
struct kvm_vcpu *dest_vcpu;
481
u8 order_code = kvm_s390_get_base_disp_rs(vcpu, NULL);
482
483
if (order_code == SIGP_EXTERNAL_CALL) {
484
trace_kvm_s390_handle_sigp_pei(vcpu, order_code, cpu_addr);
485
486
dest_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, cpu_addr);
487
BUG_ON(dest_vcpu == NULL);
488
489
kvm_s390_vcpu_wakeup(dest_vcpu);
490
kvm_s390_set_psw_cc(vcpu, SIGP_CC_ORDER_CODE_ACCEPTED);
491
return 0;
492
}
493
494
return -EOPNOTSUPP;
495
}
496
497