/* SPDX-License-Identifier: GPL-2.0 */1/* $Id: cache.h,v 1.6 2004/03/11 18:08:05 lethal Exp $2*3* include/asm-sh/cache.h4*5* Copyright 1999 (C) Niibe Yutaka6* Copyright 2002, 2003 (C) Paul Mundt7*/8#ifndef __ASM_SH_CACHE_H9#define __ASM_SH_CACHE_H1011#include <linux/init.h>12#include <cpu/cache.h>1314#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)1516/*17* Some drivers need to perform DMA into kmalloc'ed buffers18* and so we have to increase the kmalloc minalign for this.19*/20#define ARCH_DMA_MINALIGN L1_CACHE_BYTES2122#define __read_mostly __section(".data..read_mostly")2324#ifndef __ASSEMBLER__25struct cache_info {26unsigned int ways; /* Number of cache ways */27unsigned int sets; /* Number of cache sets */28unsigned int linesz; /* Cache line size (bytes) */2930unsigned int way_size; /* sets * line size */3132/*33* way_incr is the address offset for accessing the next way34* in memory mapped cache array ops.35*/36unsigned int way_incr;37unsigned int entry_shift;38unsigned int entry_mask;3940/*41* Compute a mask which selects the address bits which overlap between42* 1. those used to select the cache set during indexing43* 2. those in the physical page number.44*/45unsigned int alias_mask;46unsigned int n_aliases; /* Number of aliases */4748unsigned long flags;49};50#endif /* __ASSEMBLER__ */51#endif /* __ASM_SH_CACHE_H */525354