Path: blob/master/arch/sh/include/cpu-sh4/cpu/addrspace.h
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/* SPDX-License-Identifier: GPL-2.01*2* Copyright (C) 1999 by Kaz Kojima3*4* Defitions for the address spaces of the SH-4 CPUs.5*/6#ifndef __ASM_CPU_SH4_ADDRSPACE_H7#define __ASM_CPU_SH4_ADDRSPACE_H89#define P0SEG 0x0000000010#define P1SEG 0x8000000011#define P2SEG 0xa000000012#define P3SEG 0xc000000013#define P4SEG 0xe00000001415/* Detailed P4SEG */16#define P4SEG_STORE_QUE (P4SEG)17#define P4SEG_IC_ADDR 0xf000000018#define P4SEG_IC_DATA 0xf100000019#define P4SEG_ITLB_ADDR 0xf200000020#define P4SEG_ITLB_DATA 0xf300000021#define P4SEG_OC_ADDR 0xf400000022#define P4SEG_OC_DATA 0xf500000023#define P4SEG_TLB_ADDR 0xf600000024#define P4SEG_TLB_DATA 0xf700000025#define P4SEG_REG_BASE 0xff0000002627#define PA_AREA0 0x0000000028#define PA_AREA1 0x0400000029#define PA_AREA2 0x0800000030#define PA_AREA3 0x0c00000031#define PA_AREA4 0x1000000032#define PA_AREA5 0x1400000033#define PA_AREA6 0x1800000034#define PA_AREA7 0x1c0000003536#define PA_AREA5_IO 0xb4000000 /* Area 5 IO Memory */37#define PA_AREA6_IO 0xb8000000 /* Area 6 IO Memory */3839#endif /* __ASM_CPU_SH4_ADDRSPACE_H */40414243