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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/arch/sh/include/cpu-sh4/cpu/freq.h
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/* SPDX-License-Identifier: GPL-2.0

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 *

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 * include/asm-sh/cpu-sh4/freq.h

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 *

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 * Copyright (C) 2002, 2003 Paul Mundt

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 */

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#ifndef __ASM_CPU_SH4_FREQ_H

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#define __ASM_CPU_SH4_FREQ_H

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#if defined(CONFIG_CPU_SUBTYPE_SH7722) || \

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    defined(CONFIG_CPU_SUBTYPE_SH7723) || \

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    defined(CONFIG_CPU_SUBTYPE_SH7343) || \

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    defined(CONFIG_CPU_SUBTYPE_SH7366)

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#define FRQCR		        0xa4150000

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#define VCLKCR			0xa4150004

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#define SCLKACR			0xa4150008

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#define SCLKBCR			0xa415000c

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#define IrDACLKCR		0xa4150010

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#define MSTPCR0			0xa4150030

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#define MSTPCR1			0xa4150034

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#define MSTPCR2			0xa4150038

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#elif defined(CONFIG_CPU_SUBTYPE_SH7757)

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#define	FRQCR			0xffc80000

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#define	OSCCR			0xffc80018

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#define	PLLCR			0xffc80024

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#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \

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      defined(CONFIG_CPU_SUBTYPE_SH7780)

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#define	FRQCR			0xffc80000

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#elif defined(CONFIG_CPU_SUBTYPE_SH7724)

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#define FRQCRA			0xa4150000

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#define FRQCRB			0xa4150004

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#define VCLKCR			0xa4150048

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#define FCLKACR			0xa4150008

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#define FCLKBCR			0xa415000c

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#define FRQCR			FRQCRA

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#define SCLKACR			FCLKACR

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#define SCLKBCR			FCLKBCR

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#define FCLKACR			0xa4150008

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#define FCLKBCR			0xa415000c

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#define IrDACLKCR		0xa4150018

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#define MSTPCR0			0xa4150030

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#define MSTPCR1			0xa4150034

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#define MSTPCR2			0xa4150038

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#elif defined(CONFIG_CPU_SUBTYPE_SH7734)

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#define FRQCR0			0xffc80000

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#define FRQCR2			0xffc80008

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#define FRQMR1			0xffc80014

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#define FRQMR2			0xffc80018

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#elif defined(CONFIG_CPU_SUBTYPE_SH7785)

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#define FRQCR0			0xffc80000

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#define FRQCR1			0xffc80004

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#define FRQMR1			0xffc80014

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#elif defined(CONFIG_CPU_SUBTYPE_SH7786)

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#define FRQCR0			0xffc40000

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#define FRQCR1			0xffc40004

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#define FRQMR1			0xffc40014

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#elif defined(CONFIG_CPU_SUBTYPE_SHX3)

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#define FRQCR0			0xffc00000

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#define FRQCR1			0xffc00004

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#define FRQMR1			0xffc00014

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#else

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#define FRQCR			0xffc00000

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#define FRQCR_PSTBY		0x0200

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#define FRQCR_PLLEN		0x0400

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#define FRQCR_CKOEN		0x0800

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#endif

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#define MIN_DIVISOR_NR		0

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#define MAX_DIVISOR_NR		3

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#endif /* __ASM_CPU_SH4_FREQ_H */

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