Path: blob/master/arch/sh/include/mach-se/mach/se7724.h
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/* SPDX-License-Identifier: GPL-2.0 */1#ifndef __ASM_SH_SE7724_H2#define __ASM_SH_SE7724_H34/*5* linux/include/asm-sh/se7724.h6*7* Copyright (C) 2009 Renesas Solutions Corp.8*9* Kuninori Morimoto <[email protected]>10*11* Hitachi UL SolutionEngine 7724 Support.12*13* Based on se7722.h14* Copyright (C) 2007 Nobuhiro Iwamatsu15*/16#include <linux/sh_intc.h>17#include <asm/addrspace.h>1819/* SH Eth */20#define SH_ETH_ADDR (0xA4600000)21#define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)22#define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)2324#define PA_LED (0xba203000) /* 8bit LED */25#define IRQ_MODE (0xba200010)26#define IRQ0_SR (0xba200014)27#define IRQ1_SR (0xba200018)28#define IRQ2_SR (0xba20001c)29#define IRQ0_MR (0xba200020)30#define IRQ1_MR (0xba200024)31#define IRQ2_MR (0xba200028)3233/* IRQ */34#define IRQ0_IRQ evt2irq(0x600)35#define IRQ1_IRQ evt2irq(0x620)36#define IRQ2_IRQ evt2irq(0x640)3738/* Bits in IRQ012 registers */39#define SE7724_FPGA_IRQ_BASE (220 + 16)4041/* IRQ0 */42#define IRQ0_BASE SE7724_FPGA_IRQ_BASE43#define IRQ0_KEY (IRQ0_BASE + 12)44#define IRQ0_RMII (IRQ0_BASE + 13)45#define IRQ0_SMC (IRQ0_BASE + 14)46#define IRQ0_MASK 0x7fff47#define IRQ0_END IRQ0_SMC48/* IRQ1 */49#define IRQ1_BASE (IRQ0_END + 1)50#define IRQ1_TS (IRQ1_BASE + 0)51#define IRQ1_MASK 0x000152#define IRQ1_END IRQ1_TS53/* IRQ2 */54#define IRQ2_BASE (IRQ1_END + 1)55#define IRQ2_USB0 (IRQ1_BASE + 0)56#define IRQ2_USB1 (IRQ1_BASE + 1)57#define IRQ2_MASK 0x000358#define IRQ2_END IRQ2_USB15960#define SE7724_FPGA_IRQ_NR (IRQ2_END - IRQ0_BASE)6162/* arch/sh/boards/se/7724/irq.c */63void init_se7724_IRQ(void);6465#define __IO_PREFIX se772466#include <asm/io_generic.h>6768#endif /* __ASM_SH_SE7724_H */697071