CoCalc -- entry.S

GitHub Repository: torvalds/linux
Path: blob/master/arch/sh/kernel/cpu/sh2/entry.S
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/* SPDX-License-Identifier: GPL-2.0
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 *
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 * arch/sh/kernel/cpu/sh2/entry.S
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 *
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 * The SH-2 exception entry
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 *
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 * Copyright (C) 2005-2008 Yoshinori Sato
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 * Copyright (C) 2005  AXE,Inc.
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 */
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#include <linux/linkage.h>
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <cpu/mmu_context.h>
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#include <asm/unistd.h>
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#include <asm/errno.h>
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#include <asm/page.h>
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/* Offsets to the stack */
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OFF_R0  =  0		/* Return value. New ABI also arg4 */
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OFF_R1  =  4     	/* New ABI: arg5 */
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OFF_R2  =  8     	/* New ABI: arg6 */
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OFF_R3  =  12     	/* New ABI: syscall_nr */
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OFF_R4  =  16     	/* New ABI: arg0 */
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OFF_R5  =  20     	/* New ABI: arg1 */
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OFF_R6  =  24     	/* New ABI: arg2 */
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OFF_R7  =  28     	/* New ABI: arg3 */
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OFF_SP	=  (15*4)
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OFF_PC  =  (16*4)
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OFF_SR	=  (16*4+2*4)
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OFF_TRA	=  (16*4+6*4)
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#include <asm/entry-macros.S>
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ENTRY(exception_handler)
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	! stack
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	! r0 <- point sp
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	! r1
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	! pc
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	! sr
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	! r0 = temporary
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	! r1 = vector (pseudo EXPEVT / INTEVT / TRA)
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	mov.l	r2,@-sp
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	mov.l	r3,@-sp
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	cli
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	mov.l	$cpu_mode,r2
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#ifdef CONFIG_SMP
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	mov.l	$cpuid,r3
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	mov.l	@r3,r3
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	mov.l	@r3,r3
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	shll2	r3
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	add	r3,r2
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#endif
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	mov.l	@r2,r0
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	mov.l	@(5*4,r15),r3	! previous SR
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	or	r0,r3		! set MD
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	tst	r0,r0
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	bf/s	1f		! previous mode check
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	 mov.l	r3,@(5*4,r15)	! update SR
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	! switch to kernel mode
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	mov.l	__md_bit,r0
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	mov.l	r0,@r2		! enter kernel mode
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	mov.l	$current_thread_info,r2
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#ifdef CONFIG_SMP
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	mov.l	$cpuid,r0
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	mov.l	@r0,r0
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	mov.l	@r0,r0
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	shll2	r0
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	add	r0,r2
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#endif
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	mov.l	@r2,r2
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	mov	#(THREAD_SIZE >> 8),r0
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	shll8	r0
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	add	r2,r0
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	mov	r15,r2		! r2 = user stack top
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	mov	r0,r15		! switch kernel stack
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	mov.l	r1,@-r15	! TRA
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	sts.l	macl, @-r15
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	sts.l	mach, @-r15
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	stc.l	gbr, @-r15
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	mov.l	@(5*4,r2),r0
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	mov.l	r0,@-r15	! original SR
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	sts.l	pr,@-r15
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	mov.l	@(4*4,r2),r0
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	mov.l	r0,@-r15	! original PC
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	mov	r2,r3
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	add	#(4+2)*4,r3	! rewind r0 - r3 + exception frame
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	mov.l	r3,@-r15	! original SP
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	mov.l	r14,@-r15
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	mov.l	r13,@-r15
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	mov.l	r12,@-r15
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	mov.l	r11,@-r15
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	mov.l	r10,@-r15
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	mov.l	r9,@-r15
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	mov.l	r8,@-r15
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	mov.l	r7,@-r15
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	mov.l	r6,@-r15
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	mov.l	r5,@-r15
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	mov.l	r4,@-r15
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	mov	r1,r9		! save TRA
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	mov	r2,r8		! copy user -> kernel stack
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	mov.l	@(0,r8),r3
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	mov.l	r3,@-r15
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	mov.l	@(4,r8),r2
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	mov.l	r2,@-r15
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	mov.l	@(12,r8),r1
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	mov.l	r1,@-r15
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	mov.l	@(8,r8),r0
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	bra	2f
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	 mov.l	r0,@-r15
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1:
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	! in kernel exception
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	mov	#(22-4-4-1)*4+4,r0
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	mov	r15,r2
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	sub	r0,r15
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	mov.l	@r2+,r0		! old R3
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	mov.l	r0,@-r15	
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	mov.l	@r2+,r0		! old R2
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	mov.l	r0,@-r15	
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	mov.l	@(4,r2),r0	! old R1
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	mov.l	r0,@-r15	
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	mov.l	@r2,r0		! old R0
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	mov.l	r0,@-r15
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	add	#8,r2
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	mov.l	@r2+,r3		! old PC
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	mov.l	@r2+,r0		! old SR
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	add	#-4,r2		! exception frame stub (sr)
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	mov.l	r1,@-r2		! TRA
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	sts.l	macl, @-r2
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	sts.l	mach, @-r2
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	stc.l	gbr, @-r2
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	mov.l	r0,@-r2		! save old SR
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	sts.l	pr,@-r2
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	mov.l	r3,@-r2		! save old PC
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	mov	r2,r0
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	add	#8*4,r0
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	mov.l	r0,@-r2		! save old SP
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	mov.l	r14,@-r2
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	mov.l	r13,@-r2
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	mov.l	r12,@-r2
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	mov.l	r11,@-r2
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	mov.l	r10,@-r2
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	mov.l	r9,@-r2
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	mov.l	r8,@-r2
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	mov.l	r7,@-r2
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	mov.l	r6,@-r2
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	mov.l	r5,@-r2
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	mov.l	r4,@-r2
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	mov	r1,r9
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	mov.l	@(OFF_R0,r15),r0
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	mov.l	@(OFF_R1,r15),r1
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	mov.l	@(OFF_R2,r15),r2
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	mov.l	@(OFF_R3,r15),r3
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2:
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	mov	#64,r8
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	cmp/hs	r8,r9
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	bt	interrupt_entry	! vec >= 64 is interrupt
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	mov	#31,r8
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	cmp/hs	r8,r9
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	bt	trap_entry	! 64 > vec >= 31  is trap
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#ifdef CONFIG_CPU_J2
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	mov	#16,r8
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	cmp/hs	r8,r9
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	bt	interrupt_entry	! 31 > vec >= 16 is interrupt
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#endif
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	mov.l	4f,r8
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	mov	r9,r4
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	shll2	r9
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	add	r9,r8
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	mov.l	@r8,r8		! exception handler address
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	tst	r8,r8
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	bf	3f
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	mov.l	8f,r8		! unhandled exception
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3:
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	mov.l	5f,r10
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	jmp	@r8
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	 lds	r10,pr
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interrupt_entry:
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	mov	r9,r4
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	mov	r15,r5
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	mov.l	6f,r9
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	mov.l	7f,r8
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	jmp	@r8
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	 lds	r9,pr
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	.align	2
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4:	.long	exception_handling_table
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5:	.long	ret_from_exception
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6:	.long	ret_from_irq
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7:	.long	do_IRQ
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8:	.long	exception_error
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trap_entry:
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	mov	#0x30,r8
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	cmp/ge	r8,r9		! vector 0x1f-0x2f is systemcall
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	bt	1f
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	mov     #0x1f,r9	! convert to unified SH2/3/4 trap number
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1:	
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	shll2	r9			! TRA
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	bra	system_call	! jump common systemcall entry
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	 mov	r9,r8
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#if defined(CONFIG_SH_STANDARD_BIOS)
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	/* Unwind the stack and jmp to the debug entry */
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ENTRY(sh_bios_handler)
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	mov	r15,r0
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	add	#(22-4)*4-4,r0
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	ldc.l	@r0+,gbr
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	lds.l	@r0+,mach
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	lds.l	@r0+,macl
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	mov	r15,r0
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	mov.l	@(OFF_SP,r0),r1
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	mov	#OFF_SR,r2
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	mov.l	@(r0,r2),r3
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	mov.l	r3,@-r1
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	mov	#OFF_SP,r2
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	mov.l	@(r0,r2),r3
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	mov.l	r3,@-r1
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	mov	r15,r0
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	add	#(22-4)*4-8,r0
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	mov.l	1f,r2
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	mov.l	@r2,r2
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	stc	sr,r3
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	mov.l	r2,@r0
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	mov.l	r3,@(4,r0)
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	mov.l	r1,@(8,r0)	
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	mov.l	@r15+, r0
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	mov.l	@r15+, r1
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	mov.l	@r15+, r2
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	mov.l	@r15+, r3
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	mov.l	@r15+, r4
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	mov.l	@r15+, r5
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	mov.l	@r15+, r6
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	mov.l	@r15+, r7
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	mov.l	@r15+, r8
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	mov.l	@r15+, r9
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	mov.l	@r15+, r10
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	mov.l	@r15+, r11
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	mov.l	@r15+, r12
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	mov.l	@r15+, r13
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	mov.l	@r15+, r14
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	add	#8,r15
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	lds.l	@r15+, pr
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	mov.l	@r15+,r15
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	rte
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	 nop
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	.align	2
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1:	.long	gdb_vbr_vector
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#endif /* CONFIG_SH_STANDARD_BIOS */
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ENTRY(address_error_trap_handler)
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	mov	r15,r4				! regs
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	mov	#OFF_PC,r0
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	mov.l	@(r0,r15),r6			! pc
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	mov.l	1f,r0
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	jmp	@r0
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	 mov	#0,r5				! writeaccess is unknown
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	.align	2
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1:	.long	do_address_error
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restore_all:
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	stc	sr,r0
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	or	#0xf0,r0
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	ldc	r0,sr				! all interrupt block (same BL = 1)
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	! restore special register
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	! overlap exception frame
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	mov	r15,r0
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	add	#17*4,r0
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	lds.l	@r0+,pr
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	add	#4,r0
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	ldc.l	@r0+,gbr
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	lds.l	@r0+,mach
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	lds.l	@r0+,macl
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	mov	r15,r0
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	mov.l	$cpu_mode,r2
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#ifdef CONFIG_SMP
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	mov.l	$cpuid,r3
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	mov.l	@r3,r3
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	mov.l	@r3,r3
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	shll2	r3
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	add	r3,r2
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#endif
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	mov	#OFF_SR,r3
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	mov.l	@(r0,r3),r1
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	mov.l	__md_bit,r3
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	and	r1,r3				! copy MD bit
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	mov.l	r3,@r2
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	shll2	r1				! clear MD bit
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	shlr2	r1
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	mov.l	@(OFF_SP,r0),r2
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	add	#-8,r2
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	mov.l	r2,@(OFF_SP,r0)			! point exception frame top
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	mov.l	r1,@(4,r2)			! set sr
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	mov	#OFF_PC,r3
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	mov.l	@(r0,r3),r1
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	mov.l	r1,@r2				! set pc
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	get_current_thread_info r0, r1
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	mov.l	$current_thread_info,r1
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#ifdef CONFIG_SMP
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	mov.l	$cpuid,r3
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	mov.l	@r3,r3
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	mov.l	@r3,r3
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	shll2	r3
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	add	r3,r1
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#endif
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	mov.l	r0,@r1
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	mov.l	@r15+,r0
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	mov.l	@r15+,r1
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	mov.l	@r15+,r2
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	mov.l	@r15+,r3
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	mov.l	@r15+,r4
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	mov.l	@r15+,r5
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	mov.l	@r15+,r6
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	mov.l	@r15+,r7
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	mov.l	@r15+,r8
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	mov.l	@r15+,r9
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	mov.l	@r15+,r10
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	mov.l	@r15+,r11
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	mov.l	@r15+,r12
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	mov.l	@r15+,r13
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	mov.l	@r15+,r14
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	mov.l	@r15,r15
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	rte
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	 nop
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	.align 2
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__md_bit:
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	.long	0x40000000
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$current_thread_info:
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	.long	__current_thread_info
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$cpu_mode:	
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	.long	__cpu_mode
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#ifdef CONFIG_SMP
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$cpuid:
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	.long sh2_cpuid_addr
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#endif
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! common exception handler
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#include "../../entry-common.S"
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#ifdef CONFIG_NR_CPUS
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#define NR_CPUS CONFIG_NR_CPUS
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#else
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#define NR_CPUS 1
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#endif
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	.data
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! cpu operation mode 
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! bit30 = MD (compatible SH3/4)
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__cpu_mode:
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	.rept	NR_CPUS
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	.long	0x40000000
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	.endr
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#ifdef CONFIG_SMP
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.global sh2_cpuid_addr
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sh2_cpuid_addr:
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	.long	dummy_cpuid
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dummy_cpuid:
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	.long	0
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#endif
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	.section	.bss
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__current_thread_info:
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	.rept	NR_CPUS
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	.long	0
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	.endr
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ENTRY(exception_handling_table)
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	.space	4*32
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