Path: blob/master/arch/sh/kernel/cpu/sh2/setup-sh7619.c
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// SPDX-License-Identifier: GPL-2.01/*2* SH7619 Setup3*4* Copyright (C) 2006 Yoshinori Sato5* Copyright (C) 2009 Paul Mundt6*/7#include <linux/platform_device.h>8#include <linux/init.h>9#include <linux/serial.h>10#include <linux/serial_sci.h>11#include <linux/sh_eth.h>12#include <linux/sh_timer.h>13#include <linux/io.h>14#include <asm/platform_early.h>1516enum {17UNUSED = 0,1819/* interrupt sources */20IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,21WDT, EDMAC, CMT0, CMT1,22SCIF0, SCIF1, SCIF2,23HIF_HIFI, HIF_HIFBI,24DMAC0, DMAC1, DMAC2, DMAC3,25SIOF,26};2728static struct intc_vect vectors[] __initdata = {29INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),30INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),31INTC_IRQ(IRQ4, 80), INTC_IRQ(IRQ5, 81),32INTC_IRQ(IRQ6, 82), INTC_IRQ(IRQ7, 83),33INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),34INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87),35INTC_IRQ(SCIF0, 88), INTC_IRQ(SCIF0, 89),36INTC_IRQ(SCIF0, 90), INTC_IRQ(SCIF0, 91),37INTC_IRQ(SCIF1, 92), INTC_IRQ(SCIF1, 93),38INTC_IRQ(SCIF1, 94), INTC_IRQ(SCIF1, 95),39INTC_IRQ(SCIF2, 96), INTC_IRQ(SCIF2, 97),40INTC_IRQ(SCIF2, 98), INTC_IRQ(SCIF2, 99),41INTC_IRQ(HIF_HIFI, 100), INTC_IRQ(HIF_HIFBI, 101),42INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105),43INTC_IRQ(DMAC2, 106), INTC_IRQ(DMAC3, 107),44INTC_IRQ(SIOF, 108),45};4647static struct intc_prio_reg prio_registers[] __initdata = {48{ 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },49{ 0xf8140008, 0, 16, 4, /* IPRB */ { IRQ4, IRQ5, IRQ6, IRQ7 } },50{ 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },51{ 0xf8080002, 0, 16, 4, /* IPRD */ { SCIF0, SCIF1, SCIF2 } },52{ 0xf8080004, 0, 16, 4, /* IPRE */ { HIF_HIFI, HIF_HIFBI } },53{ 0xf8080006, 0, 16, 4, /* IPRF */ { DMAC0, DMAC1, DMAC2, DMAC3 } },54{ 0xf8080008, 0, 16, 4, /* IPRG */ { SIOF } },55};5657static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,58NULL, prio_registers, NULL);5960static struct plat_sci_port scif0_platform_data = {61.scscr = SCSCR_REIE,62.type = PORT_SCIF,63};6465static struct resource scif0_resources[] = {66DEFINE_RES_MEM(0xf8400000, 0x100),67DEFINE_RES_IRQ(88),68};6970static struct platform_device scif0_device = {71.name = "sh-sci",72.id = 0,73.resource = scif0_resources,74.num_resources = ARRAY_SIZE(scif0_resources),75.dev = {76.platform_data = &scif0_platform_data,77},78};7980static struct plat_sci_port scif1_platform_data = {81.scscr = SCSCR_REIE,82.type = PORT_SCIF,83};8485static struct resource scif1_resources[] = {86DEFINE_RES_MEM(0xf8410000, 0x100),87DEFINE_RES_IRQ(92),88};8990static struct platform_device scif1_device = {91.name = "sh-sci",92.id = 1,93.resource = scif1_resources,94.num_resources = ARRAY_SIZE(scif1_resources),95.dev = {96.platform_data = &scif1_platform_data,97},98};99100static struct plat_sci_port scif2_platform_data = {101.scscr = SCSCR_REIE,102.type = PORT_SCIF,103};104105static struct resource scif2_resources[] = {106DEFINE_RES_MEM(0xf8420000, 0x100),107DEFINE_RES_IRQ(96),108};109110static struct platform_device scif2_device = {111.name = "sh-sci",112.id = 2,113.resource = scif2_resources,114.num_resources = ARRAY_SIZE(scif2_resources),115.dev = {116.platform_data = &scif2_platform_data,117},118};119120static struct sh_eth_plat_data eth_platform_data = {121.phy = 1,122.phy_interface = PHY_INTERFACE_MODE_MII,123};124125static struct resource eth_resources[] = {126[0] = {127.start = 0xfb000000,128.end = 0xfb0001c7,129.flags = IORESOURCE_MEM,130},131[1] = {132.start = 85,133.end = 85,134.flags = IORESOURCE_IRQ,135},136};137138static struct platform_device eth_device = {139.name = "sh7619-ether",140.id = -1,141.dev = {142.platform_data = ð_platform_data,143},144.num_resources = ARRAY_SIZE(eth_resources),145.resource = eth_resources,146};147148static struct sh_timer_config cmt_platform_data = {149.channels_mask = 3,150};151152static struct resource cmt_resources[] = {153DEFINE_RES_MEM(0xf84a0070, 0x10),154DEFINE_RES_IRQ(86),155DEFINE_RES_IRQ(87),156};157158static struct platform_device cmt_device = {159.name = "sh-cmt-16",160.id = 0,161.dev = {162.platform_data = &cmt_platform_data,163},164.resource = cmt_resources,165.num_resources = ARRAY_SIZE(cmt_resources),166};167168static struct platform_device *sh7619_devices[] __initdata = {169&scif0_device,170&scif1_device,171&scif2_device,172ð_device,173&cmt_device,174};175176static int __init sh7619_devices_setup(void)177{178return platform_add_devices(sh7619_devices,179ARRAY_SIZE(sh7619_devices));180}181arch_initcall(sh7619_devices_setup);182183void __init plat_irq_setup(void)184{185register_intc_controller(&intc_desc);186}187188static struct platform_device *sh7619_early_devices[] __initdata = {189&scif0_device,190&scif1_device,191&scif2_device,192&cmt_device,193};194195#define STBCR3 0xf80a0000196197void __init plat_early_device_setup(void)198{199/* enable CMT clock */200__raw_writeb(__raw_readb(STBCR3) & ~0x10, STBCR3);201202sh_early_platform_add_devices(sh7619_early_devices,203ARRAY_SIZE(sh7619_early_devices));204}205206207