Path: blob/master/arch/sh/kernel/cpu/sh3/clock-sh7706.c
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// SPDX-License-Identifier: GPL-2.01/*2* arch/sh/kernel/cpu/sh3/clock-sh7706.c3*4* SH7706 support for the clock framework5*6* Copyright (C) 2006 Takashi YOSHII7*8* Based on arch/sh/kernel/cpu/sh3/clock-sh7709.c9* Copyright (C) 2005 Andriy Skulysh10*/11#include <linux/init.h>12#include <linux/kernel.h>13#include <asm/clock.h>14#include <asm/freq.h>15#include <asm/io.h>1617static int stc_multipliers[] = { 1, 2, 4, 1, 3, 6, 1, 1 };18static int ifc_divisors[] = { 1, 2, 4, 1, 3, 1, 1, 1 };19static int pfc_divisors[] = { 1, 2, 4, 1, 3, 6, 1, 1 };2021static void master_clk_init(struct clk *clk)22{23int frqcr = __raw_readw(FRQCR);24int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);2526clk->rate *= pfc_divisors[idx];27}2829static struct sh_clk_ops sh7706_master_clk_ops = {30.init = master_clk_init,31};3233static unsigned long module_clk_recalc(struct clk *clk)34{35int frqcr = __raw_readw(FRQCR);36int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);3738return clk->parent->rate / pfc_divisors[idx];39}4041static struct sh_clk_ops sh7706_module_clk_ops = {42.recalc = module_clk_recalc,43};4445static unsigned long bus_clk_recalc(struct clk *clk)46{47int frqcr = __raw_readw(FRQCR);48int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);4950return clk->parent->rate / stc_multipliers[idx];51}5253static struct sh_clk_ops sh7706_bus_clk_ops = {54.recalc = bus_clk_recalc,55};5657static unsigned long cpu_clk_recalc(struct clk *clk)58{59int frqcr = __raw_readw(FRQCR);60int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);6162return clk->parent->rate / ifc_divisors[idx];63}6465static struct sh_clk_ops sh7706_cpu_clk_ops = {66.recalc = cpu_clk_recalc,67};6869static struct sh_clk_ops *sh7706_clk_ops[] = {70&sh7706_master_clk_ops,71&sh7706_module_clk_ops,72&sh7706_bus_clk_ops,73&sh7706_cpu_clk_ops,74};7576void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)77{78if (idx < ARRAY_SIZE(sh7706_clk_ops))79*ops = sh7706_clk_ops[idx];80}818283