Path: blob/master/arch/sh/kernel/cpu/sh3/clock-sh7710.c
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// SPDX-License-Identifier: GPL-2.01/*2* arch/sh/kernel/cpu/sh3/clock-sh7710.c3*4* SH7710 support for the clock framework5*6* Copyright (C) 2005 Paul Mundt7*8* FRQCR parsing hacked out of arch/sh/kernel/time.c9*10* Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka11* Copyright (C) 2000 Philipp Rumpf <[email protected]>12* Copyright (C) 2002, 2003, 2004 Paul Mundt13* Copyright (C) 2002 M. R. Brown <[email protected]>14*/15#include <linux/init.h>16#include <linux/kernel.h>17#include <asm/clock.h>18#include <asm/freq.h>19#include <asm/io.h>2021static int md_table[] = { 1, 2, 3, 4, 6, 8, 12 };2223static void master_clk_init(struct clk *clk)24{25clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];26}2728static struct sh_clk_ops sh7710_master_clk_ops = {29.init = master_clk_init,30};3132static unsigned long module_clk_recalc(struct clk *clk)33{34int idx = (__raw_readw(FRQCR) & 0x0007);35return clk->parent->rate / md_table[idx];36}3738static struct sh_clk_ops sh7710_module_clk_ops = {39.recalc = module_clk_recalc,40};4142static unsigned long bus_clk_recalc(struct clk *clk)43{44int idx = (__raw_readw(FRQCR) & 0x0700) >> 8;45return clk->parent->rate / md_table[idx];46}4748static struct sh_clk_ops sh7710_bus_clk_ops = {49.recalc = bus_clk_recalc,50};5152static unsigned long cpu_clk_recalc(struct clk *clk)53{54int idx = (__raw_readw(FRQCR) & 0x0070) >> 4;55return clk->parent->rate / md_table[idx];56}5758static struct sh_clk_ops sh7710_cpu_clk_ops = {59.recalc = cpu_clk_recalc,60};6162static struct sh_clk_ops *sh7710_clk_ops[] = {63&sh7710_master_clk_ops,64&sh7710_module_clk_ops,65&sh7710_bus_clk_ops,66&sh7710_cpu_clk_ops,67};6869void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)70{71if (idx < ARRAY_SIZE(sh7710_clk_ops))72*ops = sh7710_clk_ops[idx];73}74757677