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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/arch/sh/kernel/setup.c
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// SPDX-License-Identifier: GPL-2.0
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/*
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* arch/sh/kernel/setup.c
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*
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* This file handles the architecture-dependent parts of initialization
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*
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* Copyright (C) 1999 Niibe Yutaka
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* Copyright (C) 2002 - 2010 Paul Mundt
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*/
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/initrd.h>
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#include <linux/console.h>
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#include <linux/root_dev.h>
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#include <linux/utsname.h>
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#include <linux/nodemask.h>
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#include <linux/cpu.h>
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#include <linux/pfn.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/kexec.h>
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#include <linux/module.h>
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#include <linux/smp.h>
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#include <linux/err.h>
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#include <linux/crash_dump.h>
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#include <linux/mmzone.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/platform_device.h>
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#include <linux/memblock.h>
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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#include <linux/uaccess.h>
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#include <uapi/linux/mount.h>
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#include <asm/io.h>
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#include <asm/page.h>
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#include <asm/elf.h>
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#include <asm/sections.h>
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#include <asm/irq.h>
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#include <asm/setup.h>
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#include <asm/clock.h>
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#include <asm/smp.h>
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#include <asm/mmu_context.h>
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#include <asm/mmzone.h>
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#include <asm/processor.h>
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#include <asm/sparsemem.h>
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#include <asm/platform_early.h>
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/*
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* Initialize loops_per_jiffy as 10000000 (1000MIPS).
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* This value will be used at the very early stage of serial setup.
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* The bigger value means no problem.
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*/
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struct sh_cpuinfo cpu_data[NR_CPUS] __read_mostly = {
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[0] = {
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.type = CPU_SH_NONE,
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.family = CPU_FAMILY_UNKNOWN,
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.loops_per_jiffy = 10000000,
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.phys_bits = MAX_PHYSMEM_BITS,
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},
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};
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EXPORT_SYMBOL(cpu_data);
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/*
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* The machine vector. First entry in .machvec.init, or clobbered by
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* sh_mv= on the command line, prior to .machvec.init teardown.
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*/
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struct sh_machine_vector sh_mv = { .mv_name = "generic", };
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EXPORT_SYMBOL(sh_mv);
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extern int root_mountflags;
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#define RAMDISK_IMAGE_START_MASK 0x07FF
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#define RAMDISK_PROMPT_FLAG 0x8000
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#define RAMDISK_LOAD_FLAG 0x4000
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static char __initdata command_line[COMMAND_LINE_SIZE] = { 0, };
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static struct resource code_resource = {
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.name = "Kernel code",
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.flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM,
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};
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static struct resource data_resource = {
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.name = "Kernel data",
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.flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM,
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};
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static struct resource bss_resource = {
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.name = "Kernel bss",
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.flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM,
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};
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unsigned long memory_start;
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EXPORT_SYMBOL(memory_start);
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unsigned long memory_end = 0;
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EXPORT_SYMBOL(memory_end);
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unsigned long memory_limit = 0;
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static struct resource mem_resources[MAX_NUMNODES];
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int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
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static int __init early_parse_mem(char *p)
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{
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if (!p)
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return 1;
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memory_limit = PAGE_ALIGN(memparse(p, &p));
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pr_notice("Memory limited to %ldMB\n", memory_limit >> 20);
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return 0;
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}
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early_param("mem", early_parse_mem);
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void __init check_for_initrd(void)
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{
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#ifdef CONFIG_BLK_DEV_INITRD
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unsigned long start, end;
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/*
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* Check for the rare cases where boot loaders adhere to the boot
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* ABI.
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*/
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if (!LOADER_TYPE || !INITRD_START || !INITRD_SIZE)
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goto disable;
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start = INITRD_START + __MEMORY_START;
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end = start + INITRD_SIZE;
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if (unlikely(end <= start))
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goto disable;
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if (unlikely(start & ~PAGE_MASK)) {
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pr_err("initrd must be page aligned\n");
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goto disable;
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}
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if (unlikely(start < __MEMORY_START)) {
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pr_err("initrd start (%08lx) < __MEMORY_START(%x)\n",
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start, __MEMORY_START);
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goto disable;
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}
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if (unlikely(end > memblock_end_of_DRAM())) {
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pr_err("initrd extends beyond end of memory "
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"(0x%08lx > 0x%08lx)\ndisabling initrd\n",
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end, (unsigned long)memblock_end_of_DRAM());
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goto disable;
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}
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/*
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* If we got this far in spite of the boot loader's best efforts
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* to the contrary, assume we actually have a valid initrd and
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* fix up the root dev.
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*/
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ROOT_DEV = Root_RAM0;
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/*
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* Address sanitization
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*/
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initrd_start = (unsigned long)__va(start);
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initrd_end = initrd_start + INITRD_SIZE;
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memblock_reserve(__pa(initrd_start), INITRD_SIZE);
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return;
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disable:
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pr_info("initrd disabled\n");
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initrd_start = initrd_end = 0;
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#endif
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}
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#ifndef CONFIG_GENERIC_CALIBRATE_DELAY
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void calibrate_delay(void)
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{
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struct clk *clk = clk_get(NULL, "cpu_clk");
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if (IS_ERR(clk))
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panic("Need a sane CPU clock definition!");
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loops_per_jiffy = (clk_get_rate(clk) >> 1) / HZ;
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printk(KERN_INFO "Calibrating delay loop (skipped)... "
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"%lu.%02lu BogoMIPS PRESET (lpj=%lu)\n",
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loops_per_jiffy/(500000/HZ),
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(loops_per_jiffy/(5000/HZ)) % 100,
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loops_per_jiffy);
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}
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#endif
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void __init __add_active_range(unsigned int nid, unsigned long start_pfn,
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unsigned long end_pfn)
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{
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struct resource *res = &mem_resources[nid];
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unsigned long start, end;
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WARN_ON(res->name); /* max one active range per node for now */
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start = start_pfn << PAGE_SHIFT;
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end = end_pfn << PAGE_SHIFT;
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res->name = "System RAM";
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res->start = start;
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res->end = end - 1;
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res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
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if (request_resource(&iomem_resource, res)) {
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pr_err("unable to request memory_resource 0x%lx 0x%lx\n",
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start_pfn, end_pfn);
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return;
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}
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/*
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* We don't know which RAM region contains kernel data or
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* the reserved crashkernel region, so try it repeatedly
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* and let the resource manager test it.
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*/
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request_resource(res, &code_resource);
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request_resource(res, &data_resource);
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request_resource(res, &bss_resource);
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#ifdef CONFIG_CRASH_RESERVE
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request_resource(res, &crashk_res);
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#endif
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/*
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* Also make sure that there is a PMB mapping that covers this
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* range before we attempt to activate it, to avoid reset by MMU.
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* We can hit this path with NUMA or memory hot-add.
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*/
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pmb_bolt_mapping((unsigned long)__va(start), start, end - start,
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PAGE_KERNEL);
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memblock_set_node(PFN_PHYS(start_pfn), PFN_PHYS(end_pfn - start_pfn),
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&memblock.memory, nid);
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}
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void __init __weak plat_early_device_setup(void)
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{
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}
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#ifdef CONFIG_OF_EARLY_FLATTREE
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void __ref sh_fdt_init(phys_addr_t dt_phys)
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{
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static int done = 0;
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void *dt_virt;
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/* Avoid calling an __init function on secondary cpus. */
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if (done) return;
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#ifdef CONFIG_BUILTIN_DTB
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dt_virt = __dtb_start;
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#else
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dt_virt = phys_to_virt(dt_phys);
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#endif
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if (!dt_virt || !early_init_dt_scan(dt_virt, __pa(dt_virt))) {
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pr_crit("Error: invalid device tree blob"
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" at physical address %p\n", (void *)dt_phys);
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while (true)
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cpu_relax();
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}
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done = 1;
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}
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#endif
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void __init setup_arch(char **cmdline_p)
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{
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enable_mmu();
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ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
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printk(KERN_NOTICE "Boot params:\n"
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"... MOUNT_ROOT_RDONLY - %08lx\n"
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"... RAMDISK_FLAGS - %08lx\n"
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"... ORIG_ROOT_DEV - %08lx\n"
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"... LOADER_TYPE - %08lx\n"
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"... INITRD_START - %08lx\n"
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"... INITRD_SIZE - %08lx\n",
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MOUNT_ROOT_RDONLY, RAMDISK_FLAGS,
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ORIG_ROOT_DEV, LOADER_TYPE,
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INITRD_START, INITRD_SIZE);
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#ifdef CONFIG_BLK_DEV_RAM
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rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
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#endif
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if (!MOUNT_ROOT_RDONLY)
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root_mountflags &= ~MS_RDONLY;
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setup_initial_init_mm(_text, _etext, _edata, _end);
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code_resource.start = virt_to_phys(_text);
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code_resource.end = virt_to_phys(_etext)-1;
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data_resource.start = virt_to_phys(_etext);
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data_resource.end = virt_to_phys(_edata)-1;
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bss_resource.start = virt_to_phys(__bss_start);
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bss_resource.end = virt_to_phys(__bss_stop)-1;
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#ifdef CONFIG_CMDLINE_OVERWRITE
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strscpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
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#else
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strscpy(command_line, COMMAND_LINE, sizeof(command_line));
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#ifdef CONFIG_CMDLINE_EXTEND
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strlcat(command_line, " ", sizeof(command_line));
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strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
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#endif
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#endif
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/* Save unparsed command line copy for /proc/cmdline */
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memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
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*cmdline_p = command_line;
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parse_early_param();
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plat_early_device_setup();
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sh_mv_setup();
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/* Let earlyprintk output early console messages */
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sh_early_platform_driver_probe("earlyprintk", 1, 1);
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#ifdef CONFIG_OF_EARLY_FLATTREE
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#ifdef CONFIG_BUILTIN_DTB
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unflatten_and_copy_device_tree();
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#else
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unflatten_device_tree();
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#endif
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#endif
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paging_init();
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/* Perform the machine specific initialisation */
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if (likely(sh_mv.mv_setup))
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sh_mv.mv_setup(cmdline_p);
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plat_smp_setup();
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}
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/* processor boot mode configuration */
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int generic_mode_pins(void)
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{
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pr_warn("generic_mode_pins(): missing mode pin configuration\n");
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return 0;
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}
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int test_mode_pin(int pin)
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{
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return sh_mv.mv_mode_pins() & pin;
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}
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void __init arch_cpu_finalize_init(void)
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{
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char *p = &init_utsname()->machine[2]; /* "sh" */
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select_idle_routine();
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current_cpu_data.loops_per_jiffy = loops_per_jiffy;
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switch (current_cpu_data.family) {
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case CPU_FAMILY_SH2:
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*p++ = '2';
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break;
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case CPU_FAMILY_SH2A:
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*p++ = '2';
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*p++ = 'a';
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break;
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case CPU_FAMILY_SH3:
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*p++ = '3';
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break;
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case CPU_FAMILY_SH4:
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*p++ = '4';
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break;
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case CPU_FAMILY_SH4A:
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*p++ = '4';
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*p++ = 'a';
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break;
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case CPU_FAMILY_SH4AL_DSP:
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*p++ = '4';
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*p++ = 'a';
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*p++ = 'l';
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*p++ = '-';
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*p++ = 'd';
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*p++ = 's';
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*p++ = 'p';
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break;
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case CPU_FAMILY_UNKNOWN:
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/*
391
* Specifically use CPU_FAMILY_UNKNOWN rather than
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* default:, so we're able to have the compiler whine
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* about unhandled enumerations.
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*/
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break;
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}
397
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pr_info("CPU: %s\n", get_cpu_subtype(&current_cpu_data));
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#ifndef __LITTLE_ENDIAN__
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/* 'eb' means 'Endian Big' */
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*p++ = 'e';
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*p++ = 'b';
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#endif
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*p = '\0';
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}
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