/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */1/*2* psr.h: This file holds the macros for masking off various parts of3* the processor status register on the Sparc. This is valid4* for Version 8. On the V9 this is renamed to the PSTATE5* register and its members are accessed as fields like6* PSTATE.PRIV for the current CPU privilege level.7*8* Copyright (C) 1994 David S. Miller ([email protected])9*/1011#ifndef _UAPI__LINUX_SPARC_PSR_H12#define _UAPI__LINUX_SPARC_PSR_H1314/* The Sparc PSR fields are laid out as the following:15*16* ------------------------------------------------------------------------17* | impl | vers | icc | resv | EC | EF | PIL | S | PS | ET | CWP |18* | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6 | 5 | 4-0 |19* ------------------------------------------------------------------------20*/21#define PSR_CWP 0x0000001f /* current window pointer */22#define PSR_ET 0x00000020 /* enable traps field */23#define PSR_PS 0x00000040 /* previous privilege level */24#define PSR_S 0x00000080 /* current privilege level */25#define PSR_PIL 0x00000f00 /* processor interrupt level */26#define PSR_EF 0x00001000 /* enable floating point */27#define PSR_EC 0x00002000 /* enable co-processor */28#define PSR_SYSCALL 0x00004000 /* inside of a syscall */29#define PSR_LE 0x00008000 /* SuperSparcII little-endian */30#define PSR_ICC 0x00f00000 /* integer condition codes */31#define PSR_C 0x00100000 /* carry bit */32#define PSR_V 0x00200000 /* overflow bit */33#define PSR_Z 0x00400000 /* zero bit */34#define PSR_N 0x00800000 /* negative bit */35#define PSR_VERS 0x0f000000 /* cpu-version field */36#define PSR_IMPL 0xf0000000 /* cpu-implementation field */3738#define PSR_VERS_SHIFT 2439#define PSR_IMPL_SHIFT 2840#define PSR_VERS_SHIFTED_MASK 0xf41#define PSR_IMPL_SHIFTED_MASK 0xf4243#define PSR_IMPL_TI 0x444#define PSR_IMPL_LEON 0xf454647#endif /* _UAPI__LINUX_SPARC_PSR_H */484950