CoCalc -- cast6-avx-x86_64-asm

GitHub Repository: torvalds/linux
Path: blob/master/arch/x86/crypto/cast6-avx-x86_64-asm_64.S
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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 * Cast6 Cipher 8-way parallel algorithm (AVX/x86_64)
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 *
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 * Copyright (C) 2012 Johannes Goetzfried
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 *     <[email protected]>
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 *
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 * Copyright © 2012-2013 Jussi Kivilinna <[email protected]>
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 */
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#include <linux/linkage.h>
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#include <asm/frame.h>
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#include "glue_helper-asm-avx.S"
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.file "cast6-avx-x86_64-asm_64.S"
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.extern cast_s1
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.extern cast_s2
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.extern cast_s3
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.extern cast_s4
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/* structure of crypto context */
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#define km	0
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#define kr	(12*4*4)
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/* s-boxes */
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#define s1	cast_s1
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#define s2	cast_s2
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#define s3	cast_s3
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#define s4	cast_s4
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/**********************************************************************
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  8-way AVX cast6
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 **********************************************************************/
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#define CTX %r15
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#define RA1 %xmm0
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#define RB1 %xmm1
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#define RC1 %xmm2
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#define RD1 %xmm3
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#define RA2 %xmm4
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#define RB2 %xmm5
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#define RC2 %xmm6
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#define RD2 %xmm7
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#define RX  %xmm8
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#define RKM  %xmm9
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#define RKR  %xmm10
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#define RKRF %xmm11
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#define RKRR %xmm12
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#define R32  %xmm13
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#define R1ST %xmm14
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#define RTMP %xmm15
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#define RID1  %rdi
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#define RID1d %edi
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#define RID2  %rsi
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#define RID2d %esi
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#define RGI1   %rdx
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#define RGI1bl %dl
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#define RGI1bh %dh
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#define RGI2   %rcx
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#define RGI2bl %cl
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#define RGI2bh %ch
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#define RGI3   %rax
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#define RGI3bl %al
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#define RGI3bh %ah
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#define RGI4   %rbx
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#define RGI4bl %bl
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#define RGI4bh %bh
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#define RFS1  %r8
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#define RFS1d %r8d
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#define RFS2  %r9
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#define RFS2d %r9d
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#define RFS3  %r10
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#define RFS3d %r10d
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#define lookup_32bit(src, dst, op1, op2, op3, interleave_op, il_reg) \
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	movzbl		src ## bh,     RID1d;    \
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	leaq		s1(%rip),      RID2;     \
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	movl		(RID2,RID1,4), dst ## d; \
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	movzbl		src ## bl,     RID2d;    \
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	leaq		s2(%rip),      RID1;     \
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	op1		(RID1,RID2,4), dst ## d; \
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	shrq $16,	src;                     \
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	movzbl		src ## bh,     RID1d;    \
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	leaq		s3(%rip),      RID2;     \
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	op2		(RID2,RID1,4), dst ## d; \
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	movzbl		src ## bl,     RID2d;    \
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	interleave_op(il_reg);			 \
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	leaq		s4(%rip),      RID1;     \
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	op3		(RID1,RID2,4), dst ## d;
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#define dummy(d) /* do nothing */
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#define shr_next(reg) \
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	shrq $16,	reg;
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#define F_head(a, x, gi1, gi2, op0) \
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	op0	a,	RKM,  x;                 \
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	vpslld	RKRF,	x,    RTMP;              \
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	vpsrld	RKRR,	x,    x;                 \
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	vpor	RTMP,	x,    x;                 \
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	\
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	vmovq		x,    gi1;               \
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	vpextrq $1,	x,    gi2;
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#define F_tail(a, x, gi1, gi2, op1, op2, op3) \
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	lookup_32bit(##gi1, RFS1, op1, op2, op3, shr_next, ##gi1); \
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	lookup_32bit(##gi2, RFS3, op1, op2, op3, shr_next, ##gi2); \
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	\
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	lookup_32bit(##gi1, RFS2, op1, op2, op3, dummy, none);     \
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	shlq $32,	RFS2;                                      \
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	orq		RFS1, RFS2;                                \
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	lookup_32bit(##gi2, RFS1, op1, op2, op3, dummy, none);     \
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	shlq $32,	RFS1;                                      \
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	orq		RFS1, RFS3;                                \
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	\
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	vmovq		RFS2, x;                                   \
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	vpinsrq $1,	RFS3, x, x;
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#define F_2(a1, b1, a2, b2, op0, op1, op2, op3) \
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	F_head(b1, RX, RGI1, RGI2, op0);              \
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	F_head(b2, RX, RGI3, RGI4, op0);              \
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	\
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	F_tail(b1, RX, RGI1, RGI2, op1, op2, op3);    \
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	F_tail(b2, RTMP, RGI3, RGI4, op1, op2, op3);  \
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	\
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	vpxor		a1, RX,   a1;                 \
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	vpxor		a2, RTMP, a2;
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#define F1_2(a1, b1, a2, b2) \
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	F_2(a1, b1, a2, b2, vpaddd, xorl, subl, addl)
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#define F2_2(a1, b1, a2, b2) \
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	F_2(a1, b1, a2, b2, vpxor, subl, addl, xorl)
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#define F3_2(a1, b1, a2, b2) \
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	F_2(a1, b1, a2, b2, vpsubd, addl, xorl, subl)
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#define qop(in, out, f) \
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	F ## f ## _2(out ## 1, in ## 1, out ## 2, in ## 2);
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#define get_round_keys(nn) \
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	vbroadcastss	(km+(4*(nn)))(CTX), RKM;        \
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	vpand		R1ST,               RKR,  RKRF; \
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	vpsubq		RKRF,               R32,  RKRR; \
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	vpsrldq $1,	RKR,                RKR;
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#define Q(n) \
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	get_round_keys(4*n+0); \
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	qop(RD, RC, 1);        \
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	\
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	get_round_keys(4*n+1); \
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	qop(RC, RB, 2);        \
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	\
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	get_round_keys(4*n+2); \
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	qop(RB, RA, 3);        \
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	\
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	get_round_keys(4*n+3); \
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	qop(RA, RD, 1);
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#define QBAR(n) \
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	get_round_keys(4*n+3); \
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	qop(RA, RD, 1);        \
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	\
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	get_round_keys(4*n+2); \
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	qop(RB, RA, 3);        \
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	\
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	get_round_keys(4*n+1); \
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	qop(RC, RB, 2);        \
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	\
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	get_round_keys(4*n+0); \
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	qop(RD, RC, 1);
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#define shuffle(mask) \
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	vpshufb		mask(%rip),            RKR, RKR;
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#define preload_rkr(n, do_mask, mask) \
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	vbroadcastss	.L16_mask(%rip),          RKR;      \
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	/* add 16-bit rotation to key rotations (mod 32) */ \
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	vpxor		(kr+n*16)(CTX),           RKR, RKR; \
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	do_mask(mask);
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#define transpose_4x4(x0, x1, x2, x3, t0, t1, t2) \
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	vpunpckldq		x1, x0, t0; \
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	vpunpckhdq		x1, x0, t2; \
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	vpunpckldq		x3, x2, t1; \
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	vpunpckhdq		x3, x2, x3; \
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	\
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	vpunpcklqdq		t1, t0, x0; \
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	vpunpckhqdq		t1, t0, x1; \
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	vpunpcklqdq		x3, t2, x2; \
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	vpunpckhqdq		x3, t2, x3;
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#define inpack_blocks(x0, x1, x2, x3, t0, t1, t2, rmask) \
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	vpshufb rmask, x0,	x0; \
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	vpshufb rmask, x1,	x1; \
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	vpshufb rmask, x2,	x2; \
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	vpshufb rmask, x3,	x3; \
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	\
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	transpose_4x4(x0, x1, x2, x3, t0, t1, t2)
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#define outunpack_blocks(x0, x1, x2, x3, t0, t1, t2, rmask) \
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	transpose_4x4(x0, x1, x2, x3, t0, t1, t2) \
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	\
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	vpshufb rmask,		x0, x0;       \
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	vpshufb rmask,		x1, x1;       \
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	vpshufb rmask,		x2, x2;       \
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	vpshufb rmask,		x3, x3;
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.section	.rodata.cst16, "aM", @progbits, 16
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.align 16
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.Lbswap_mask:
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	.byte 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12
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.Lbswap128_mask:
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	.byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0
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.Lrkr_enc_Q_Q_QBAR_QBAR:
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	.byte 0, 1, 2, 3, 4, 5, 6, 7, 11, 10, 9, 8, 15, 14, 13, 12
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.Lrkr_enc_QBAR_QBAR_QBAR_QBAR:
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	.byte 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12
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.Lrkr_dec_Q_Q_Q_Q:
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	.byte 12, 13, 14, 15, 8, 9, 10, 11, 4, 5, 6, 7, 0, 1, 2, 3
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.Lrkr_dec_Q_Q_QBAR_QBAR:
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	.byte 12, 13, 14, 15, 8, 9, 10, 11, 7, 6, 5, 4, 3, 2, 1, 0
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.Lrkr_dec_QBAR_QBAR_QBAR_QBAR:
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	.byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0
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.section	.rodata.cst4.L16_mask, "aM", @progbits, 4
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.align 4
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.L16_mask:
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	.byte 16, 16, 16, 16
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.section	.rodata.cst4.L32_mask, "aM", @progbits, 4
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.align 4
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.L32_mask:
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	.byte 32, 0, 0, 0
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.section	.rodata.cst4.first_mask, "aM", @progbits, 4
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.align 4
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.Lfirst_mask:
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	.byte 0x1f, 0, 0, 0
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.text
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.align 8
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SYM_FUNC_START_LOCAL(__cast6_enc_blk8)
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	/* input:
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	 *	%rdi: ctx
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	 *	RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2: blocks
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	 * output:
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	 *	RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2: encrypted blocks
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	 */
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	pushq %r15;
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	pushq %rbx;
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	movq %rdi, CTX;
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	vmovdqa .Lbswap_mask(%rip), RKM;
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	vmovd .Lfirst_mask(%rip), R1ST;
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	vmovd .L32_mask(%rip), R32;
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	inpack_blocks(RA1, RB1, RC1, RD1, RTMP, RX, RKRF, RKM);
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	inpack_blocks(RA2, RB2, RC2, RD2, RTMP, RX, RKRF, RKM);
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	preload_rkr(0, dummy, none);
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	Q(0);
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	Q(1);
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	Q(2);
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	Q(3);
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	preload_rkr(1, shuffle, .Lrkr_enc_Q_Q_QBAR_QBAR);
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	Q(4);
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	Q(5);
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	QBAR(6);
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	QBAR(7);
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	preload_rkr(2, shuffle, .Lrkr_enc_QBAR_QBAR_QBAR_QBAR);
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	QBAR(8);
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	QBAR(9);
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	QBAR(10);
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	QBAR(11);
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	popq %rbx;
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	popq %r15;
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	vmovdqa .Lbswap_mask(%rip), RKM;
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	outunpack_blocks(RA1, RB1, RC1, RD1, RTMP, RX, RKRF, RKM);
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	outunpack_blocks(RA2, RB2, RC2, RD2, RTMP, RX, RKRF, RKM);
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	RET;
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SYM_FUNC_END(__cast6_enc_blk8)
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.align 8
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SYM_FUNC_START_LOCAL(__cast6_dec_blk8)
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	/* input:
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	 *	%rdi: ctx
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	 *	RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2: encrypted blocks
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	 * output:
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	 *	RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2: decrypted blocks
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	 */
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	pushq %r15;
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	pushq %rbx;
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	movq %rdi, CTX;
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	vmovdqa .Lbswap_mask(%rip), RKM;
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	vmovd .Lfirst_mask(%rip), R1ST;
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	vmovd .L32_mask(%rip), R32;
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	inpack_blocks(RA1, RB1, RC1, RD1, RTMP, RX, RKRF, RKM);
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	inpack_blocks(RA2, RB2, RC2, RD2, RTMP, RX, RKRF, RKM);
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	preload_rkr(2, shuffle, .Lrkr_dec_Q_Q_Q_Q);
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	Q(11);
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	Q(10);
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	Q(9);
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	Q(8);
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	preload_rkr(1, shuffle, .Lrkr_dec_Q_Q_QBAR_QBAR);
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	Q(7);
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	Q(6);
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	QBAR(5);
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	QBAR(4);
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	preload_rkr(0, shuffle, .Lrkr_dec_QBAR_QBAR_QBAR_QBAR);
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	QBAR(3);
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	QBAR(2);
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	QBAR(1);
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	QBAR(0);
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	popq %rbx;
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	popq %r15;
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	vmovdqa .Lbswap_mask(%rip), RKM;
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	outunpack_blocks(RA1, RB1, RC1, RD1, RTMP, RX, RKRF, RKM);
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	outunpack_blocks(RA2, RB2, RC2, RD2, RTMP, RX, RKRF, RKM);
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	RET;
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SYM_FUNC_END(__cast6_dec_blk8)
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SYM_FUNC_START(cast6_ecb_enc_8way)
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	/* input:
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	 *	%rdi: ctx
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	 *	%rsi: dst
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	 *	%rdx: src
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	 */
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	FRAME_BEGIN
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	pushq %r15;
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	movq %rdi, CTX;
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	movq %rsi, %r11;
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	load_8way(%rdx, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
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	call __cast6_enc_blk8;
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	store_8way(%r11, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
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	popq %r15;
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	FRAME_END
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	RET;
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SYM_FUNC_END(cast6_ecb_enc_8way)
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SYM_FUNC_START(cast6_ecb_dec_8way)
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	/* input:
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	 *	%rdi: ctx
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	 *	%rsi: dst
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	 *	%rdx: src
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	 */
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	FRAME_BEGIN
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	pushq %r15;
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	movq %rdi, CTX;
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	movq %rsi, %r11;
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	load_8way(%rdx, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
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	call __cast6_dec_blk8;
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	store_8way(%r11, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
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	popq %r15;
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	FRAME_END
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	RET;
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SYM_FUNC_END(cast6_ecb_dec_8way)
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SYM_FUNC_START(cast6_cbc_dec_8way)
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	/* input:
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	 *	%rdi: ctx
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	 *	%rsi: dst
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	 *	%rdx: src
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	 */
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	FRAME_BEGIN
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	pushq %r12;
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	pushq %r15;
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	movq %rdi, CTX;
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	movq %rsi, %r11;
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	movq %rdx, %r12;
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	load_8way(%rdx, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
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	call __cast6_dec_blk8;
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	store_cbc_8way(%r12, %r11, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);
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	popq %r15;
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	popq %r12;
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	FRAME_END
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	RET;
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SYM_FUNC_END(cast6_cbc_dec_8way)
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