Path: blob/master/arch/x86/crypto/serpent-avx-x86_64-asm_64.S
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/* SPDX-License-Identifier: GPL-2.0-or-later */1/*2* Serpent Cipher 8-way parallel algorithm (x86_64/AVX)3*4* Copyright (C) 2012 Johannes Goetzfried5* <[email protected]>6*7* Copyright © 2011-2013 Jussi Kivilinna <[email protected]>8*/910#include <linux/linkage.h>11#include <linux/cfi_types.h>12#include <asm/frame.h>13#include "glue_helper-asm-avx.S"1415.file "serpent-avx-x86_64-asm_64.S"1617.section .rodata.cst16.bswap128_mask, "aM", @progbits, 1618.align 1619.Lbswap128_mask:20.byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 02122.text2324#define CTX %rdi2526/**********************************************************************278-way AVX serpent28**********************************************************************/29#define RA1 %xmm030#define RB1 %xmm131#define RC1 %xmm232#define RD1 %xmm333#define RE1 %xmm43435#define tp %xmm53637#define RA2 %xmm638#define RB2 %xmm739#define RC2 %xmm840#define RD2 %xmm941#define RE2 %xmm104243#define RNOT %xmm114445#define RK0 %xmm1246#define RK1 %xmm1347#define RK2 %xmm1448#define RK3 %xmm15495051#define S0_1(x0, x1, x2, x3, x4) \52vpor x0, x3, tp; \53vpxor x3, x0, x0; \54vpxor x2, x3, x4; \55vpxor RNOT, x4, x4; \56vpxor x1, tp, x3; \57vpand x0, x1, x1; \58vpxor x4, x1, x1; \59vpxor x0, x2, x2;60#define S0_2(x0, x1, x2, x3, x4) \61vpxor x3, x0, x0; \62vpor x0, x4, x4; \63vpxor x2, x0, x0; \64vpand x1, x2, x2; \65vpxor x2, x3, x3; \66vpxor RNOT, x1, x1; \67vpxor x4, x2, x2; \68vpxor x2, x1, x1;6970#define S1_1(x0, x1, x2, x3, x4) \71vpxor x0, x1, tp; \72vpxor x3, x0, x0; \73vpxor RNOT, x3, x3; \74vpand tp, x1, x4; \75vpor tp, x0, x0; \76vpxor x2, x3, x3; \77vpxor x3, x0, x0; \78vpxor x3, tp, x1;79#define S1_2(x0, x1, x2, x3, x4) \80vpxor x4, x3, x3; \81vpor x4, x1, x1; \82vpxor x2, x4, x4; \83vpand x0, x2, x2; \84vpxor x1, x2, x2; \85vpor x0, x1, x1; \86vpxor RNOT, x0, x0; \87vpxor x2, x0, x0; \88vpxor x1, x4, x4;8990#define S2_1(x0, x1, x2, x3, x4) \91vpxor RNOT, x3, x3; \92vpxor x0, x1, x1; \93vpand x2, x0, tp; \94vpxor x3, tp, tp; \95vpor x0, x3, x3; \96vpxor x1, x2, x2; \97vpxor x1, x3, x3; \98vpand tp, x1, x1;99#define S2_2(x0, x1, x2, x3, x4) \100vpxor x2, tp, tp; \101vpand x3, x2, x2; \102vpor x1, x3, x3; \103vpxor RNOT, tp, tp; \104vpxor tp, x3, x3; \105vpxor tp, x0, x4; \106vpxor x2, tp, x0; \107vpor x2, x1, x1;108109#define S3_1(x0, x1, x2, x3, x4) \110vpxor x3, x1, tp; \111vpor x0, x3, x3; \112vpand x0, x1, x4; \113vpxor x2, x0, x0; \114vpxor tp, x2, x2; \115vpand x3, tp, x1; \116vpxor x3, x2, x2; \117vpor x4, x0, x0; \118vpxor x3, x4, x4;119#define S3_2(x0, x1, x2, x3, x4) \120vpxor x0, x1, x1; \121vpand x3, x0, x0; \122vpand x4, x3, x3; \123vpxor x2, x3, x3; \124vpor x1, x4, x4; \125vpand x1, x2, x2; \126vpxor x3, x4, x4; \127vpxor x3, x0, x0; \128vpxor x2, x3, x3;129130#define S4_1(x0, x1, x2, x3, x4) \131vpand x0, x3, tp; \132vpxor x3, x0, x0; \133vpxor x2, tp, tp; \134vpor x3, x2, x2; \135vpxor x1, x0, x0; \136vpxor tp, x3, x4; \137vpor x0, x2, x2; \138vpxor x1, x2, x2;139#define S4_2(x0, x1, x2, x3, x4) \140vpand x0, x1, x1; \141vpxor x4, x1, x1; \142vpand x2, x4, x4; \143vpxor tp, x2, x2; \144vpxor x0, x4, x4; \145vpor x1, tp, x3; \146vpxor RNOT, x1, x1; \147vpxor x0, x3, x3;148149#define S5_1(x0, x1, x2, x3, x4) \150vpor x0, x1, tp; \151vpxor tp, x2, x2; \152vpxor RNOT, x3, x3; \153vpxor x0, x1, x4; \154vpxor x2, x0, x0; \155vpand x4, tp, x1; \156vpor x3, x4, x4; \157vpxor x0, x4, x4;158#define S5_2(x0, x1, x2, x3, x4) \159vpand x3, x0, x0; \160vpxor x3, x1, x1; \161vpxor x2, x3, x3; \162vpxor x1, x0, x0; \163vpand x4, x2, x2; \164vpxor x2, x1, x1; \165vpand x0, x2, x2; \166vpxor x2, x3, x3;167168#define S6_1(x0, x1, x2, x3, x4) \169vpxor x0, x3, x3; \170vpxor x2, x1, tp; \171vpxor x0, x2, x2; \172vpand x3, x0, x0; \173vpor x3, tp, tp; \174vpxor RNOT, x1, x4; \175vpxor tp, x0, x0; \176vpxor x2, tp, x1;177#define S6_2(x0, x1, x2, x3, x4) \178vpxor x4, x3, x3; \179vpxor x0, x4, x4; \180vpand x0, x2, x2; \181vpxor x1, x4, x4; \182vpxor x3, x2, x2; \183vpand x1, x3, x3; \184vpxor x0, x3, x3; \185vpxor x2, x1, x1;186187#define S7_1(x0, x1, x2, x3, x4) \188vpxor RNOT, x1, tp; \189vpxor RNOT, x0, x0; \190vpand x2, tp, x1; \191vpxor x3, x1, x1; \192vpor tp, x3, x3; \193vpxor x2, tp, x4; \194vpxor x3, x2, x2; \195vpxor x0, x3, x3; \196vpor x1, x0, x0;197#define S7_2(x0, x1, x2, x3, x4) \198vpand x0, x2, x2; \199vpxor x4, x0, x0; \200vpxor x3, x4, x4; \201vpand x0, x3, x3; \202vpxor x1, x4, x4; \203vpxor x4, x2, x2; \204vpxor x1, x3, x3; \205vpor x0, x4, x4; \206vpxor x1, x4, x4;207208#define SI0_1(x0, x1, x2, x3, x4) \209vpxor x0, x1, x1; \210vpor x1, x3, tp; \211vpxor x1, x3, x4; \212vpxor RNOT, x0, x0; \213vpxor tp, x2, x2; \214vpxor x0, tp, x3; \215vpand x1, x0, x0; \216vpxor x2, x0, x0;217#define SI0_2(x0, x1, x2, x3, x4) \218vpand x3, x2, x2; \219vpxor x4, x3, x3; \220vpxor x3, x2, x2; \221vpxor x3, x1, x1; \222vpand x0, x3, x3; \223vpxor x0, x1, x1; \224vpxor x2, x0, x0; \225vpxor x3, x4, x4;226227#define SI1_1(x0, x1, x2, x3, x4) \228vpxor x3, x1, x1; \229vpxor x2, x0, tp; \230vpxor RNOT, x2, x2; \231vpor x1, x0, x4; \232vpxor x3, x4, x4; \233vpand x1, x3, x3; \234vpxor x2, x1, x1; \235vpand x4, x2, x2;236#define SI1_2(x0, x1, x2, x3, x4) \237vpxor x1, x4, x4; \238vpor x3, x1, x1; \239vpxor tp, x3, x3; \240vpxor tp, x2, x2; \241vpor x4, tp, x0; \242vpxor x4, x2, x2; \243vpxor x0, x1, x1; \244vpxor x1, x4, x4;245246#define SI2_1(x0, x1, x2, x3, x4) \247vpxor x1, x2, x2; \248vpxor RNOT, x3, tp; \249vpor x2, tp, tp; \250vpxor x3, x2, x2; \251vpxor x0, x3, x4; \252vpxor x1, tp, x3; \253vpor x2, x1, x1; \254vpxor x0, x2, x2;255#define SI2_2(x0, x1, x2, x3, x4) \256vpxor x4, x1, x1; \257vpor x3, x4, x4; \258vpxor x3, x2, x2; \259vpxor x2, x4, x4; \260vpand x1, x2, x2; \261vpxor x3, x2, x2; \262vpxor x4, x3, x3; \263vpxor x0, x4, x4;264265#define SI3_1(x0, x1, x2, x3, x4) \266vpxor x1, x2, x2; \267vpand x2, x1, tp; \268vpxor x0, tp, tp; \269vpor x1, x0, x0; \270vpxor x3, x1, x4; \271vpxor x3, x0, x0; \272vpor tp, x3, x3; \273vpxor x2, tp, x1;274#define SI3_2(x0, x1, x2, x3, x4) \275vpxor x3, x1, x1; \276vpxor x2, x0, x0; \277vpxor x3, x2, x2; \278vpand x1, x3, x3; \279vpxor x0, x1, x1; \280vpand x2, x0, x0; \281vpxor x3, x4, x4; \282vpxor x0, x3, x3; \283vpxor x1, x0, x0;284285#define SI4_1(x0, x1, x2, x3, x4) \286vpxor x3, x2, x2; \287vpand x1, x0, tp; \288vpxor x2, tp, tp; \289vpor x3, x2, x2; \290vpxor RNOT, x0, x4; \291vpxor tp, x1, x1; \292vpxor x2, tp, x0; \293vpand x4, x2, x2;294#define SI4_2(x0, x1, x2, x3, x4) \295vpxor x0, x2, x2; \296vpor x4, x0, x0; \297vpxor x3, x0, x0; \298vpand x2, x3, x3; \299vpxor x3, x4, x4; \300vpxor x1, x3, x3; \301vpand x0, x1, x1; \302vpxor x1, x4, x4; \303vpxor x3, x0, x0;304305#define SI5_1(x0, x1, x2, x3, x4) \306vpor x2, x1, tp; \307vpxor x1, x2, x2; \308vpxor x3, tp, tp; \309vpand x1, x3, x3; \310vpxor x3, x2, x2; \311vpor x0, x3, x3; \312vpxor RNOT, x0, x0; \313vpxor x2, x3, x3; \314vpor x0, x2, x2;315#define SI5_2(x0, x1, x2, x3, x4) \316vpxor tp, x1, x4; \317vpxor x4, x2, x2; \318vpand x0, x4, x4; \319vpxor tp, x0, x0; \320vpxor x3, tp, x1; \321vpand x2, x0, x0; \322vpxor x3, x2, x2; \323vpxor x2, x0, x0; \324vpxor x4, x2, x2; \325vpxor x3, x4, x4;326327#define SI6_1(x0, x1, x2, x3, x4) \328vpxor x2, x0, x0; \329vpand x3, x0, tp; \330vpxor x3, x2, x2; \331vpxor x2, tp, tp; \332vpxor x1, x3, x3; \333vpor x0, x2, x2; \334vpxor x3, x2, x2; \335vpand tp, x3, x3;336#define SI6_2(x0, x1, x2, x3, x4) \337vpxor RNOT, tp, tp; \338vpxor x1, x3, x3; \339vpand x2, x1, x1; \340vpxor tp, x0, x4; \341vpxor x4, x3, x3; \342vpxor x2, x4, x4; \343vpxor x1, tp, x0; \344vpxor x0, x2, x2;345346#define SI7_1(x0, x1, x2, x3, x4) \347vpand x0, x3, tp; \348vpxor x2, x0, x0; \349vpor x3, x2, x2; \350vpxor x1, x3, x4; \351vpxor RNOT, x0, x0; \352vpor tp, x1, x1; \353vpxor x0, x4, x4; \354vpand x2, x0, x0; \355vpxor x1, x0, x0;356#define SI7_2(x0, x1, x2, x3, x4) \357vpand x2, x1, x1; \358vpxor x2, tp, x3; \359vpxor x3, x4, x4; \360vpand x3, x2, x2; \361vpor x0, x3, x3; \362vpxor x4, x1, x1; \363vpxor x4, x3, x3; \364vpand x0, x4, x4; \365vpxor x2, x4, x4;366367#define get_key(i, j, t) \368vbroadcastss (4*(i)+(j))*4(CTX), t;369370#define K2(x0, x1, x2, x3, x4, i) \371get_key(i, 0, RK0); \372get_key(i, 1, RK1); \373get_key(i, 2, RK2); \374get_key(i, 3, RK3); \375vpxor RK0, x0 ## 1, x0 ## 1; \376vpxor RK1, x1 ## 1, x1 ## 1; \377vpxor RK2, x2 ## 1, x2 ## 1; \378vpxor RK3, x3 ## 1, x3 ## 1; \379vpxor RK0, x0 ## 2, x0 ## 2; \380vpxor RK1, x1 ## 2, x1 ## 2; \381vpxor RK2, x2 ## 2, x2 ## 2; \382vpxor RK3, x3 ## 2, x3 ## 2;383384#define LK2(x0, x1, x2, x3, x4, i) \385vpslld $13, x0 ## 1, x4 ## 1; \386vpsrld $(32 - 13), x0 ## 1, x0 ## 1; \387vpor x4 ## 1, x0 ## 1, x0 ## 1; \388vpxor x0 ## 1, x1 ## 1, x1 ## 1; \389vpslld $3, x2 ## 1, x4 ## 1; \390vpsrld $(32 - 3), x2 ## 1, x2 ## 1; \391vpor x4 ## 1, x2 ## 1, x2 ## 1; \392vpxor x2 ## 1, x1 ## 1, x1 ## 1; \393vpslld $13, x0 ## 2, x4 ## 2; \394vpsrld $(32 - 13), x0 ## 2, x0 ## 2; \395vpor x4 ## 2, x0 ## 2, x0 ## 2; \396vpxor x0 ## 2, x1 ## 2, x1 ## 2; \397vpslld $3, x2 ## 2, x4 ## 2; \398vpsrld $(32 - 3), x2 ## 2, x2 ## 2; \399vpor x4 ## 2, x2 ## 2, x2 ## 2; \400vpxor x2 ## 2, x1 ## 2, x1 ## 2; \401vpslld $1, x1 ## 1, x4 ## 1; \402vpsrld $(32 - 1), x1 ## 1, x1 ## 1; \403vpor x4 ## 1, x1 ## 1, x1 ## 1; \404vpslld $3, x0 ## 1, x4 ## 1; \405vpxor x2 ## 1, x3 ## 1, x3 ## 1; \406vpxor x4 ## 1, x3 ## 1, x3 ## 1; \407get_key(i, 1, RK1); \408vpslld $1, x1 ## 2, x4 ## 2; \409vpsrld $(32 - 1), x1 ## 2, x1 ## 2; \410vpor x4 ## 2, x1 ## 2, x1 ## 2; \411vpslld $3, x0 ## 2, x4 ## 2; \412vpxor x2 ## 2, x3 ## 2, x3 ## 2; \413vpxor x4 ## 2, x3 ## 2, x3 ## 2; \414get_key(i, 3, RK3); \415vpslld $7, x3 ## 1, x4 ## 1; \416vpsrld $(32 - 7), x3 ## 1, x3 ## 1; \417vpor x4 ## 1, x3 ## 1, x3 ## 1; \418vpslld $7, x1 ## 1, x4 ## 1; \419vpxor x1 ## 1, x0 ## 1, x0 ## 1; \420vpxor x3 ## 1, x0 ## 1, x0 ## 1; \421vpxor x3 ## 1, x2 ## 1, x2 ## 1; \422vpxor x4 ## 1, x2 ## 1, x2 ## 1; \423get_key(i, 0, RK0); \424vpslld $7, x3 ## 2, x4 ## 2; \425vpsrld $(32 - 7), x3 ## 2, x3 ## 2; \426vpor x4 ## 2, x3 ## 2, x3 ## 2; \427vpslld $7, x1 ## 2, x4 ## 2; \428vpxor x1 ## 2, x0 ## 2, x0 ## 2; \429vpxor x3 ## 2, x0 ## 2, x0 ## 2; \430vpxor x3 ## 2, x2 ## 2, x2 ## 2; \431vpxor x4 ## 2, x2 ## 2, x2 ## 2; \432get_key(i, 2, RK2); \433vpxor RK1, x1 ## 1, x1 ## 1; \434vpxor RK3, x3 ## 1, x3 ## 1; \435vpslld $5, x0 ## 1, x4 ## 1; \436vpsrld $(32 - 5), x0 ## 1, x0 ## 1; \437vpor x4 ## 1, x0 ## 1, x0 ## 1; \438vpslld $22, x2 ## 1, x4 ## 1; \439vpsrld $(32 - 22), x2 ## 1, x2 ## 1; \440vpor x4 ## 1, x2 ## 1, x2 ## 1; \441vpxor RK0, x0 ## 1, x0 ## 1; \442vpxor RK2, x2 ## 1, x2 ## 1; \443vpxor RK1, x1 ## 2, x1 ## 2; \444vpxor RK3, x3 ## 2, x3 ## 2; \445vpslld $5, x0 ## 2, x4 ## 2; \446vpsrld $(32 - 5), x0 ## 2, x0 ## 2; \447vpor x4 ## 2, x0 ## 2, x0 ## 2; \448vpslld $22, x2 ## 2, x4 ## 2; \449vpsrld $(32 - 22), x2 ## 2, x2 ## 2; \450vpor x4 ## 2, x2 ## 2, x2 ## 2; \451vpxor RK0, x0 ## 2, x0 ## 2; \452vpxor RK2, x2 ## 2, x2 ## 2;453454#define KL2(x0, x1, x2, x3, x4, i) \455vpxor RK0, x0 ## 1, x0 ## 1; \456vpxor RK2, x2 ## 1, x2 ## 1; \457vpsrld $5, x0 ## 1, x4 ## 1; \458vpslld $(32 - 5), x0 ## 1, x0 ## 1; \459vpor x4 ## 1, x0 ## 1, x0 ## 1; \460vpxor RK3, x3 ## 1, x3 ## 1; \461vpxor RK1, x1 ## 1, x1 ## 1; \462vpsrld $22, x2 ## 1, x4 ## 1; \463vpslld $(32 - 22), x2 ## 1, x2 ## 1; \464vpor x4 ## 1, x2 ## 1, x2 ## 1; \465vpxor x3 ## 1, x2 ## 1, x2 ## 1; \466vpxor RK0, x0 ## 2, x0 ## 2; \467vpxor RK2, x2 ## 2, x2 ## 2; \468vpsrld $5, x0 ## 2, x4 ## 2; \469vpslld $(32 - 5), x0 ## 2, x0 ## 2; \470vpor x4 ## 2, x0 ## 2, x0 ## 2; \471vpxor RK3, x3 ## 2, x3 ## 2; \472vpxor RK1, x1 ## 2, x1 ## 2; \473vpsrld $22, x2 ## 2, x4 ## 2; \474vpslld $(32 - 22), x2 ## 2, x2 ## 2; \475vpor x4 ## 2, x2 ## 2, x2 ## 2; \476vpxor x3 ## 2, x2 ## 2, x2 ## 2; \477vpxor x3 ## 1, x0 ## 1, x0 ## 1; \478vpslld $7, x1 ## 1, x4 ## 1; \479vpxor x1 ## 1, x0 ## 1, x0 ## 1; \480vpxor x4 ## 1, x2 ## 1, x2 ## 1; \481vpsrld $1, x1 ## 1, x4 ## 1; \482vpslld $(32 - 1), x1 ## 1, x1 ## 1; \483vpor x4 ## 1, x1 ## 1, x1 ## 1; \484vpxor x3 ## 2, x0 ## 2, x0 ## 2; \485vpslld $7, x1 ## 2, x4 ## 2; \486vpxor x1 ## 2, x0 ## 2, x0 ## 2; \487vpxor x4 ## 2, x2 ## 2, x2 ## 2; \488vpsrld $1, x1 ## 2, x4 ## 2; \489vpslld $(32 - 1), x1 ## 2, x1 ## 2; \490vpor x4 ## 2, x1 ## 2, x1 ## 2; \491vpsrld $7, x3 ## 1, x4 ## 1; \492vpslld $(32 - 7), x3 ## 1, x3 ## 1; \493vpor x4 ## 1, x3 ## 1, x3 ## 1; \494vpxor x0 ## 1, x1 ## 1, x1 ## 1; \495vpslld $3, x0 ## 1, x4 ## 1; \496vpxor x4 ## 1, x3 ## 1, x3 ## 1; \497vpsrld $7, x3 ## 2, x4 ## 2; \498vpslld $(32 - 7), x3 ## 2, x3 ## 2; \499vpor x4 ## 2, x3 ## 2, x3 ## 2; \500vpxor x0 ## 2, x1 ## 2, x1 ## 2; \501vpslld $3, x0 ## 2, x4 ## 2; \502vpxor x4 ## 2, x3 ## 2, x3 ## 2; \503vpsrld $13, x0 ## 1, x4 ## 1; \504vpslld $(32 - 13), x0 ## 1, x0 ## 1; \505vpor x4 ## 1, x0 ## 1, x0 ## 1; \506vpxor x2 ## 1, x1 ## 1, x1 ## 1; \507vpxor x2 ## 1, x3 ## 1, x3 ## 1; \508vpsrld $3, x2 ## 1, x4 ## 1; \509vpslld $(32 - 3), x2 ## 1, x2 ## 1; \510vpor x4 ## 1, x2 ## 1, x2 ## 1; \511vpsrld $13, x0 ## 2, x4 ## 2; \512vpslld $(32 - 13), x0 ## 2, x0 ## 2; \513vpor x4 ## 2, x0 ## 2, x0 ## 2; \514vpxor x2 ## 2, x1 ## 2, x1 ## 2; \515vpxor x2 ## 2, x3 ## 2, x3 ## 2; \516vpsrld $3, x2 ## 2, x4 ## 2; \517vpslld $(32 - 3), x2 ## 2, x2 ## 2; \518vpor x4 ## 2, x2 ## 2, x2 ## 2;519520#define S(SBOX, x0, x1, x2, x3, x4) \521SBOX ## _1(x0 ## 1, x1 ## 1, x2 ## 1, x3 ## 1, x4 ## 1); \522SBOX ## _2(x0 ## 1, x1 ## 1, x2 ## 1, x3 ## 1, x4 ## 1); \523SBOX ## _1(x0 ## 2, x1 ## 2, x2 ## 2, x3 ## 2, x4 ## 2); \524SBOX ## _2(x0 ## 2, x1 ## 2, x2 ## 2, x3 ## 2, x4 ## 2);525526#define SP(SBOX, x0, x1, x2, x3, x4, i) \527get_key(i, 0, RK0); \528SBOX ## _1(x0 ## 1, x1 ## 1, x2 ## 1, x3 ## 1, x4 ## 1); \529get_key(i, 2, RK2); \530SBOX ## _2(x0 ## 1, x1 ## 1, x2 ## 1, x3 ## 1, x4 ## 1); \531get_key(i, 3, RK3); \532SBOX ## _1(x0 ## 2, x1 ## 2, x2 ## 2, x3 ## 2, x4 ## 2); \533get_key(i, 1, RK1); \534SBOX ## _2(x0 ## 2, x1 ## 2, x2 ## 2, x3 ## 2, x4 ## 2); \535536#define transpose_4x4(x0, x1, x2, x3, t0, t1, t2) \537vpunpckldq x1, x0, t0; \538vpunpckhdq x1, x0, t2; \539vpunpckldq x3, x2, t1; \540vpunpckhdq x3, x2, x3; \541\542vpunpcklqdq t1, t0, x0; \543vpunpckhqdq t1, t0, x1; \544vpunpcklqdq x3, t2, x2; \545vpunpckhqdq x3, t2, x3;546547#define read_blocks(x0, x1, x2, x3, t0, t1, t2) \548transpose_4x4(x0, x1, x2, x3, t0, t1, t2)549550#define write_blocks(x0, x1, x2, x3, t0, t1, t2) \551transpose_4x4(x0, x1, x2, x3, t0, t1, t2)552553SYM_FUNC_START_LOCAL(__serpent_enc_blk8_avx)554/* input:555* %rdi: ctx, CTX556* RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2: blocks557* output:558* RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2: encrypted blocks559*/560561vpcmpeqd RNOT, RNOT, RNOT;562563read_blocks(RA1, RB1, RC1, RD1, RK0, RK1, RK2);564read_blocks(RA2, RB2, RC2, RD2, RK0, RK1, RK2);565566K2(RA, RB, RC, RD, RE, 0);567S(S0, RA, RB, RC, RD, RE); LK2(RC, RB, RD, RA, RE, 1);568S(S1, RC, RB, RD, RA, RE); LK2(RE, RD, RA, RC, RB, 2);569S(S2, RE, RD, RA, RC, RB); LK2(RB, RD, RE, RC, RA, 3);570S(S3, RB, RD, RE, RC, RA); LK2(RC, RA, RD, RB, RE, 4);571S(S4, RC, RA, RD, RB, RE); LK2(RA, RD, RB, RE, RC, 5);572S(S5, RA, RD, RB, RE, RC); LK2(RC, RA, RD, RE, RB, 6);573S(S6, RC, RA, RD, RE, RB); LK2(RD, RB, RA, RE, RC, 7);574S(S7, RD, RB, RA, RE, RC); LK2(RC, RA, RE, RD, RB, 8);575S(S0, RC, RA, RE, RD, RB); LK2(RE, RA, RD, RC, RB, 9);576S(S1, RE, RA, RD, RC, RB); LK2(RB, RD, RC, RE, RA, 10);577S(S2, RB, RD, RC, RE, RA); LK2(RA, RD, RB, RE, RC, 11);578S(S3, RA, RD, RB, RE, RC); LK2(RE, RC, RD, RA, RB, 12);579S(S4, RE, RC, RD, RA, RB); LK2(RC, RD, RA, RB, RE, 13);580S(S5, RC, RD, RA, RB, RE); LK2(RE, RC, RD, RB, RA, 14);581S(S6, RE, RC, RD, RB, RA); LK2(RD, RA, RC, RB, RE, 15);582S(S7, RD, RA, RC, RB, RE); LK2(RE, RC, RB, RD, RA, 16);583S(S0, RE, RC, RB, RD, RA); LK2(RB, RC, RD, RE, RA, 17);584S(S1, RB, RC, RD, RE, RA); LK2(RA, RD, RE, RB, RC, 18);585S(S2, RA, RD, RE, RB, RC); LK2(RC, RD, RA, RB, RE, 19);586S(S3, RC, RD, RA, RB, RE); LK2(RB, RE, RD, RC, RA, 20);587S(S4, RB, RE, RD, RC, RA); LK2(RE, RD, RC, RA, RB, 21);588S(S5, RE, RD, RC, RA, RB); LK2(RB, RE, RD, RA, RC, 22);589S(S6, RB, RE, RD, RA, RC); LK2(RD, RC, RE, RA, RB, 23);590S(S7, RD, RC, RE, RA, RB); LK2(RB, RE, RA, RD, RC, 24);591S(S0, RB, RE, RA, RD, RC); LK2(RA, RE, RD, RB, RC, 25);592S(S1, RA, RE, RD, RB, RC); LK2(RC, RD, RB, RA, RE, 26);593S(S2, RC, RD, RB, RA, RE); LK2(RE, RD, RC, RA, RB, 27);594S(S3, RE, RD, RC, RA, RB); LK2(RA, RB, RD, RE, RC, 28);595S(S4, RA, RB, RD, RE, RC); LK2(RB, RD, RE, RC, RA, 29);596S(S5, RB, RD, RE, RC, RA); LK2(RA, RB, RD, RC, RE, 30);597S(S6, RA, RB, RD, RC, RE); LK2(RD, RE, RB, RC, RA, 31);598S(S7, RD, RE, RB, RC, RA); K2(RA, RB, RC, RD, RE, 32);599600write_blocks(RA1, RB1, RC1, RD1, RK0, RK1, RK2);601write_blocks(RA2, RB2, RC2, RD2, RK0, RK1, RK2);602603RET;604SYM_FUNC_END(__serpent_enc_blk8_avx)605606SYM_FUNC_START_LOCAL(__serpent_dec_blk8_avx)607/* input:608* %rdi: ctx, CTX609* RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2: encrypted blocks610* output:611* RC1, RD1, RB1, RE1, RC2, RD2, RB2, RE2: decrypted blocks612*/613614vpcmpeqd RNOT, RNOT, RNOT;615616read_blocks(RA1, RB1, RC1, RD1, RK0, RK1, RK2);617read_blocks(RA2, RB2, RC2, RD2, RK0, RK1, RK2);618619K2(RA, RB, RC, RD, RE, 32);620SP(SI7, RA, RB, RC, RD, RE, 31); KL2(RB, RD, RA, RE, RC, 31);621SP(SI6, RB, RD, RA, RE, RC, 30); KL2(RA, RC, RE, RB, RD, 30);622SP(SI5, RA, RC, RE, RB, RD, 29); KL2(RC, RD, RA, RE, RB, 29);623SP(SI4, RC, RD, RA, RE, RB, 28); KL2(RC, RA, RB, RE, RD, 28);624SP(SI3, RC, RA, RB, RE, RD, 27); KL2(RB, RC, RD, RE, RA, 27);625SP(SI2, RB, RC, RD, RE, RA, 26); KL2(RC, RA, RE, RD, RB, 26);626SP(SI1, RC, RA, RE, RD, RB, 25); KL2(RB, RA, RE, RD, RC, 25);627SP(SI0, RB, RA, RE, RD, RC, 24); KL2(RE, RC, RA, RB, RD, 24);628SP(SI7, RE, RC, RA, RB, RD, 23); KL2(RC, RB, RE, RD, RA, 23);629SP(SI6, RC, RB, RE, RD, RA, 22); KL2(RE, RA, RD, RC, RB, 22);630SP(SI5, RE, RA, RD, RC, RB, 21); KL2(RA, RB, RE, RD, RC, 21);631SP(SI4, RA, RB, RE, RD, RC, 20); KL2(RA, RE, RC, RD, RB, 20);632SP(SI3, RA, RE, RC, RD, RB, 19); KL2(RC, RA, RB, RD, RE, 19);633SP(SI2, RC, RA, RB, RD, RE, 18); KL2(RA, RE, RD, RB, RC, 18);634SP(SI1, RA, RE, RD, RB, RC, 17); KL2(RC, RE, RD, RB, RA, 17);635SP(SI0, RC, RE, RD, RB, RA, 16); KL2(RD, RA, RE, RC, RB, 16);636SP(SI7, RD, RA, RE, RC, RB, 15); KL2(RA, RC, RD, RB, RE, 15);637SP(SI6, RA, RC, RD, RB, RE, 14); KL2(RD, RE, RB, RA, RC, 14);638SP(SI5, RD, RE, RB, RA, RC, 13); KL2(RE, RC, RD, RB, RA, 13);639SP(SI4, RE, RC, RD, RB, RA, 12); KL2(RE, RD, RA, RB, RC, 12);640SP(SI3, RE, RD, RA, RB, RC, 11); KL2(RA, RE, RC, RB, RD, 11);641SP(SI2, RA, RE, RC, RB, RD, 10); KL2(RE, RD, RB, RC, RA, 10);642SP(SI1, RE, RD, RB, RC, RA, 9); KL2(RA, RD, RB, RC, RE, 9);643SP(SI0, RA, RD, RB, RC, RE, 8); KL2(RB, RE, RD, RA, RC, 8);644SP(SI7, RB, RE, RD, RA, RC, 7); KL2(RE, RA, RB, RC, RD, 7);645SP(SI6, RE, RA, RB, RC, RD, 6); KL2(RB, RD, RC, RE, RA, 6);646SP(SI5, RB, RD, RC, RE, RA, 5); KL2(RD, RA, RB, RC, RE, 5);647SP(SI4, RD, RA, RB, RC, RE, 4); KL2(RD, RB, RE, RC, RA, 4);648SP(SI3, RD, RB, RE, RC, RA, 3); KL2(RE, RD, RA, RC, RB, 3);649SP(SI2, RE, RD, RA, RC, RB, 2); KL2(RD, RB, RC, RA, RE, 2);650SP(SI1, RD, RB, RC, RA, RE, 1); KL2(RE, RB, RC, RA, RD, 1);651S(SI0, RE, RB, RC, RA, RD); K2(RC, RD, RB, RE, RA, 0);652653write_blocks(RC1, RD1, RB1, RE1, RK0, RK1, RK2);654write_blocks(RC2, RD2, RB2, RE2, RK0, RK1, RK2);655656RET;657SYM_FUNC_END(__serpent_dec_blk8_avx)658659SYM_TYPED_FUNC_START(serpent_ecb_enc_8way_avx)660/* input:661* %rdi: ctx, CTX662* %rsi: dst663* %rdx: src664*/665FRAME_BEGIN666667load_8way(%rdx, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);668669call __serpent_enc_blk8_avx;670671store_8way(%rsi, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);672673FRAME_END674RET;675SYM_FUNC_END(serpent_ecb_enc_8way_avx)676677SYM_TYPED_FUNC_START(serpent_ecb_dec_8way_avx)678/* input:679* %rdi: ctx, CTX680* %rsi: dst681* %rdx: src682*/683FRAME_BEGIN684685load_8way(%rdx, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);686687call __serpent_dec_blk8_avx;688689store_8way(%rsi, RC1, RD1, RB1, RE1, RC2, RD2, RB2, RE2);690691FRAME_END692RET;693SYM_FUNC_END(serpent_ecb_dec_8way_avx)694695SYM_TYPED_FUNC_START(serpent_cbc_dec_8way_avx)696/* input:697* %rdi: ctx, CTX698* %rsi: dst699* %rdx: src700*/701FRAME_BEGIN702703load_8way(%rdx, RA1, RB1, RC1, RD1, RA2, RB2, RC2, RD2);704705call __serpent_dec_blk8_avx;706707store_cbc_8way(%rdx, %rsi, RC1, RD1, RB1, RE1, RC2, RD2, RB2, RE2);708709FRAME_END710RET;711SYM_FUNC_END(serpent_cbc_dec_8way_avx)712713714