CoCalc -- sm4_aesni_avx2

GitHub Repository: torvalds/linux
Path: blob/master/arch/x86/crypto/sm4_aesni_avx2_glue.c
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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 * SM4 Cipher Algorithm, AES-NI/AVX2 optimized.
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 * as specified in
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 * https://tools.ietf.org/id/draft-ribose-cfrg-sm4-10.html
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 *
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 * Copyright (c) 2021, Alibaba Group.
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 * Copyright (c) 2021 Tianjia Zhang <[email protected]>
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 */
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#include <asm/fpu/api.h>
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#include <linux/module.h>
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#include <linux/crypto.h>
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#include <linux/kernel.h>
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#include <crypto/internal/skcipher.h>
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#include <crypto/sm4.h>
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#include "sm4-avx.h"
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#define SM4_CRYPT16_BLOCK_SIZE	(SM4_BLOCK_SIZE * 16)
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asmlinkage void sm4_aesni_avx2_ctr_enc_blk16(const u32 *rk, u8 *dst,
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					const u8 *src, u8 *iv);
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asmlinkage void sm4_aesni_avx2_cbc_dec_blk16(const u32 *rk, u8 *dst,
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					const u8 *src, u8 *iv);
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static int sm4_skcipher_setkey(struct crypto_skcipher *tfm, const u8 *key,
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			unsigned int key_len)
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{
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	struct sm4_ctx *ctx = crypto_skcipher_ctx(tfm);
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	return sm4_expandkey(ctx, key, key_len);
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}
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static int cbc_decrypt(struct skcipher_request *req)
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{
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	return sm4_avx_cbc_decrypt(req, SM4_CRYPT16_BLOCK_SIZE,
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				sm4_aesni_avx2_cbc_dec_blk16);
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}
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static int ctr_crypt(struct skcipher_request *req)
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{
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	return sm4_avx_ctr_crypt(req, SM4_CRYPT16_BLOCK_SIZE,
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				sm4_aesni_avx2_ctr_enc_blk16);
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}
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static struct skcipher_alg sm4_aesni_avx2_skciphers[] = {
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	{
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		.base = {
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			.cra_name		= "ecb(sm4)",
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			.cra_driver_name	= "ecb-sm4-aesni-avx2",
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			.cra_priority		= 500,
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			.cra_blocksize		= SM4_BLOCK_SIZE,
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			.cra_ctxsize		= sizeof(struct sm4_ctx),
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			.cra_module		= THIS_MODULE,
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		},
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		.min_keysize	= SM4_KEY_SIZE,
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		.max_keysize	= SM4_KEY_SIZE,
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		.walksize	= 16 * SM4_BLOCK_SIZE,
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		.setkey		= sm4_skcipher_setkey,
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		.encrypt	= sm4_avx_ecb_encrypt,
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		.decrypt	= sm4_avx_ecb_decrypt,
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	}, {
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		.base = {
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			.cra_name		= "cbc(sm4)",
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			.cra_driver_name	= "cbc-sm4-aesni-avx2",
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			.cra_priority		= 500,
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			.cra_blocksize		= SM4_BLOCK_SIZE,
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			.cra_ctxsize		= sizeof(struct sm4_ctx),
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			.cra_module		= THIS_MODULE,
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		},
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		.min_keysize	= SM4_KEY_SIZE,
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		.max_keysize	= SM4_KEY_SIZE,
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		.ivsize		= SM4_BLOCK_SIZE,
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		.walksize	= 16 * SM4_BLOCK_SIZE,
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		.setkey		= sm4_skcipher_setkey,
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		.encrypt	= sm4_cbc_encrypt,
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		.decrypt	= cbc_decrypt,
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	}, {
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		.base = {
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			.cra_name		= "ctr(sm4)",
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			.cra_driver_name	= "ctr-sm4-aesni-avx2",
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			.cra_priority		= 500,
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			.cra_blocksize		= 1,
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			.cra_ctxsize		= sizeof(struct sm4_ctx),
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			.cra_module		= THIS_MODULE,
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		},
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		.min_keysize	= SM4_KEY_SIZE,
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		.max_keysize	= SM4_KEY_SIZE,
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		.ivsize		= SM4_BLOCK_SIZE,
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		.chunksize	= SM4_BLOCK_SIZE,
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		.walksize	= 16 * SM4_BLOCK_SIZE,
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		.setkey		= sm4_skcipher_setkey,
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		.encrypt	= ctr_crypt,
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		.decrypt	= ctr_crypt,
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	}
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};
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static int __init sm4_init(void)
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{
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	const char *feature_name;
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	if (!boot_cpu_has(X86_FEATURE_AVX) ||
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	    !boot_cpu_has(X86_FEATURE_AVX2) ||
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	    !boot_cpu_has(X86_FEATURE_AES) ||
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	    !boot_cpu_has(X86_FEATURE_OSXSAVE)) {
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		pr_info("AVX2 or AES-NI instructions are not detected.\n");
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		return -ENODEV;
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	}
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	if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM,
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				&feature_name)) {
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		pr_info("CPU feature '%s' is not supported.\n", feature_name);
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		return -ENODEV;
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	}
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	return crypto_register_skciphers(sm4_aesni_avx2_skciphers,
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					 ARRAY_SIZE(sm4_aesni_avx2_skciphers));
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}
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static void __exit sm4_exit(void)
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{
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	crypto_unregister_skciphers(sm4_aesni_avx2_skciphers,
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				    ARRAY_SIZE(sm4_aesni_avx2_skciphers));
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}
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module_init(sm4_init);
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module_exit(sm4_exit);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Tianjia Zhang <[email protected]>");
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MODULE_DESCRIPTION("SM4 Cipher Algorithm, AES-NI/AVX2 optimized");
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MODULE_ALIAS_CRYPTO("sm4");
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MODULE_ALIAS_CRYPTO("sm4-aesni-avx2");
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