/* SPDX-License-Identifier: GPL-2.0 */1#ifndef _ASM_X86_AGP_H2#define _ASM_X86_AGP_H34#include <linux/pgtable.h>5#include <asm/cacheflush.h>67/*8* Functions to keep the agpgart mappings coherent with the MMU. The9* GART gives the CPU a physical alias of pages in memory. The alias10* region is mapped uncacheable. Make sure there are no conflicting11* mappings with different cacheability attributes for the same12* page. This avoids data corruption on some CPUs.13*/1415#define map_page_into_agp(page) set_pages_uc(page, 1)16#define unmap_page_from_agp(page) set_pages_wb(page, 1)1718/*19* Could use CLFLUSH here if the cpu supports it. But then it would20* need to be called for each cacheline of the whole page so it may21* not be worth it. Would need a page for it.22*/23#define flush_agp_cache() wbinvd()2425#endif /* _ASM_X86_AGP_H */262728