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torvalds
GitHub Repository: torvalds/linux
 Path: blob/master/arch/x86/include/asm/amd/nb.h
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/* SPDX-License-Identifier: GPL-2.0 */

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#ifndef _ASM_X86_AMD_NB_H

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#define _ASM_X86_AMD_NB_H

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#include <linux/ioport.h>

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#include <linux/pci.h>

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#include <asm/amd/node.h>

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struct amd_nb_bus_dev_range {

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	u8 bus;

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	u8 dev_base;

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	u8 dev_limit;

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};

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extern const struct amd_nb_bus_dev_range amd_nb_bus_dev_ranges[];

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extern bool early_is_amd_nb(u32 value);

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extern struct resource *amd_get_mmconfig_range(struct resource *res);

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extern void amd_flush_garts(void);

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extern int amd_numa_init(void);

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extern int amd_get_subcaches(int);

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extern int amd_set_subcaches(int, unsigned long);

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struct amd_l3_cache {

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	unsigned indices;

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	u8	 subcaches[4];

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};

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struct amd_northbridge {

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	struct pci_dev *misc;

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	struct pci_dev *link;

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	struct amd_l3_cache l3_cache;

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};

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struct amd_northbridge_info {

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	u16 num;

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	u64 flags;

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	struct amd_northbridge *nb;

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};

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#define AMD_NB_GART			BIT(0)

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#define AMD_NB_L3_INDEX_DISABLE		BIT(1)

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#define AMD_NB_L3_PARTITIONING		BIT(2)

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#ifdef CONFIG_AMD_NB

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u16 amd_nb_num(void);

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bool amd_nb_has_feature(unsigned int feature);

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struct amd_northbridge *node_to_amd_nb(int node);

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static inline bool amd_gart_present(void)

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{

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	if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)

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		return false;

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	/* GART present only on Fam15h, up to model 0fh */

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	if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 ||

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	    (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model < 0x10))

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		return true;

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	return false;

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}

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#else

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#define amd_nb_num(x)		0

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#define amd_nb_has_feature(x)	false

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static inline struct amd_northbridge *node_to_amd_nb(int node)

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{

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	return NULL;

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}

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#define amd_gart_present(x)	false

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#endif

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#endif /* _ASM_X86_AMD_NB_H */

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