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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/arch/x86/include/asm/atomic64_32.h
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_ATOMIC64_32_H
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#define _ASM_X86_ATOMIC64_32_H
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#include <linux/compiler.h>
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#include <linux/types.h>
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//#include <asm/cmpxchg.h>
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/* An 64bit atomic type */
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typedef struct {
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s64 __aligned(8) counter;
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} atomic64_t;
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#define ATOMIC64_INIT(val) { (val) }
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/*
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* Read an atomic64_t non-atomically.
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*
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* This is intended to be used in cases where a subsequent atomic operation
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* will handle the torn value, and can be used to prime the first iteration
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* of unconditional try_cmpxchg() loops, e.g.:
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*
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* s64 val = arch_atomic64_read_nonatomic(v);
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* do { } while (!arch_atomic64_try_cmpxchg(v, &val, val OP i);
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*
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* This is NOT safe to use where the value is not always checked by a
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* subsequent atomic operation, such as in conditional try_cmpxchg() loops
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* that can break before the atomic operation, e.g.:
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*
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* s64 val = arch_atomic64_read_nonatomic(v);
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* do {
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* if (condition(val))
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* break;
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* } while (!arch_atomic64_try_cmpxchg(v, &val, val OP i);
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*/
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static __always_inline s64 arch_atomic64_read_nonatomic(const atomic64_t *v)
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{
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/* See comment in arch_atomic_read(). */
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return __READ_ONCE(v->counter);
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}
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#define __ATOMIC64_DECL(sym) void atomic64_##sym(atomic64_t *, ...)
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#ifndef ATOMIC64_EXPORT
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#define ATOMIC64_DECL_ONE __ATOMIC64_DECL
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#else
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#define ATOMIC64_DECL_ONE(sym) __ATOMIC64_DECL(sym); \
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ATOMIC64_EXPORT(atomic64_##sym)
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#endif
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#ifdef CONFIG_X86_CX8
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#define __alternative_atomic64(f, g, out, in, clobbers...) \
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asm volatile("call %c[func]" \
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: ALT_OUTPUT_SP(out) \
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: [func] "i" (atomic64_##g##_cx8) \
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COMMA(in) \
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: clobbers)
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#define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8)
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#else
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#define __alternative_atomic64(f, g, out, in, clobbers...) \
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alternative_call(atomic64_##f##_386, atomic64_##g##_cx8, \
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X86_FEATURE_CX8, ASM_OUTPUT(out), \
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ASM_INPUT(in), clobbers)
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#define ATOMIC64_DECL(sym) ATOMIC64_DECL_ONE(sym##_cx8); \
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ATOMIC64_DECL_ONE(sym##_386)
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ATOMIC64_DECL_ONE(add_386);
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ATOMIC64_DECL_ONE(sub_386);
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ATOMIC64_DECL_ONE(inc_386);
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ATOMIC64_DECL_ONE(dec_386);
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#endif
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#define alternative_atomic64(f, out, in, clobbers...) \
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__alternative_atomic64(f, f, ASM_OUTPUT(out), ASM_INPUT(in), clobbers)
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ATOMIC64_DECL(read);
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ATOMIC64_DECL(set);
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ATOMIC64_DECL(xchg);
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ATOMIC64_DECL(add_return);
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ATOMIC64_DECL(sub_return);
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ATOMIC64_DECL(inc_return);
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ATOMIC64_DECL(dec_return);
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ATOMIC64_DECL(dec_if_positive);
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ATOMIC64_DECL(inc_not_zero);
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ATOMIC64_DECL(add_unless);
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#undef ATOMIC64_DECL
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#undef ATOMIC64_DECL_ONE
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#undef __ATOMIC64_DECL
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#undef ATOMIC64_EXPORT
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static __always_inline s64 arch_atomic64_cmpxchg(atomic64_t *v, s64 old, s64 new)
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{
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return arch_cmpxchg64(&v->counter, old, new);
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}
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#define arch_atomic64_cmpxchg arch_atomic64_cmpxchg
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static __always_inline bool arch_atomic64_try_cmpxchg(atomic64_t *v, s64 *old, s64 new)
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{
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return arch_try_cmpxchg64(&v->counter, old, new);
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}
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#define arch_atomic64_try_cmpxchg arch_atomic64_try_cmpxchg
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static __always_inline s64 arch_atomic64_xchg(atomic64_t *v, s64 n)
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{
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s64 o;
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unsigned high = (unsigned)(n >> 32);
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unsigned low = (unsigned)n;
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alternative_atomic64(xchg,
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"=&A" (o),
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ASM_INPUT("S" (v), "b" (low), "c" (high)),
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"memory");
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return o;
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}
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#define arch_atomic64_xchg arch_atomic64_xchg
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static __always_inline void arch_atomic64_set(atomic64_t *v, s64 i)
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{
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unsigned high = (unsigned)(i >> 32);
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unsigned low = (unsigned)i;
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alternative_atomic64(set,
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/* no output */,
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ASM_INPUT("S" (v), "b" (low), "c" (high)),
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"eax", "edx", "memory");
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}
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static __always_inline s64 arch_atomic64_read(const atomic64_t *v)
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{
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s64 r;
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alternative_atomic64(read, "=&A" (r), "c" (v), "memory");
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return r;
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}
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static __always_inline s64 arch_atomic64_add_return(s64 i, atomic64_t *v)
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{
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alternative_atomic64(add_return,
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ASM_OUTPUT("+A" (i), "+c" (v)),
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/* no input */,
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"memory");
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return i;
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}
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#define arch_atomic64_add_return arch_atomic64_add_return
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static __always_inline s64 arch_atomic64_sub_return(s64 i, atomic64_t *v)
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{
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alternative_atomic64(sub_return,
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ASM_OUTPUT("+A" (i), "+c" (v)),
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/* no input */,
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"memory");
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return i;
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}
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#define arch_atomic64_sub_return arch_atomic64_sub_return
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static __always_inline s64 arch_atomic64_inc_return(atomic64_t *v)
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{
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s64 a;
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alternative_atomic64(inc_return,
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"=&A" (a),
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"S" (v),
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"memory", "ecx");
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return a;
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}
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#define arch_atomic64_inc_return arch_atomic64_inc_return
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static __always_inline s64 arch_atomic64_dec_return(atomic64_t *v)
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{
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s64 a;
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alternative_atomic64(dec_return,
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"=&A" (a),
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"S" (v),
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"memory", "ecx");
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return a;
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}
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#define arch_atomic64_dec_return arch_atomic64_dec_return
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static __always_inline void arch_atomic64_add(s64 i, atomic64_t *v)
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{
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__alternative_atomic64(add, add_return,
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ASM_OUTPUT("+A" (i), "+c" (v)),
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/* no input */,
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"memory");
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}
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static __always_inline void arch_atomic64_sub(s64 i, atomic64_t *v)
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{
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__alternative_atomic64(sub, sub_return,
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ASM_OUTPUT("+A" (i), "+c" (v)),
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/* no input */,
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"memory");
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}
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static __always_inline void arch_atomic64_inc(atomic64_t *v)
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{
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__alternative_atomic64(inc, inc_return,
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/* no output */,
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"S" (v),
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"memory", "eax", "ecx", "edx");
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}
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#define arch_atomic64_inc arch_atomic64_inc
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static __always_inline void arch_atomic64_dec(atomic64_t *v)
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{
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__alternative_atomic64(dec, dec_return,
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/* no output */,
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"S" (v),
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"memory", "eax", "ecx", "edx");
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}
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#define arch_atomic64_dec arch_atomic64_dec
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static __always_inline int arch_atomic64_add_unless(atomic64_t *v, s64 a, s64 u)
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{
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unsigned low = (unsigned)u;
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unsigned high = (unsigned)(u >> 32);
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alternative_atomic64(add_unless,
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ASM_OUTPUT("+A" (a), "+c" (low), "+D" (high)),
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"S" (v),
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"memory");
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return (int)a;
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}
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#define arch_atomic64_add_unless arch_atomic64_add_unless
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static __always_inline int arch_atomic64_inc_not_zero(atomic64_t *v)
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{
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int r;
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alternative_atomic64(inc_not_zero,
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"=&a" (r),
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"S" (v),
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"ecx", "edx", "memory");
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return r;
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}
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#define arch_atomic64_inc_not_zero arch_atomic64_inc_not_zero
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static __always_inline s64 arch_atomic64_dec_if_positive(atomic64_t *v)
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{
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s64 r;
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alternative_atomic64(dec_if_positive,
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"=&A" (r),
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"S" (v),
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"ecx", "memory");
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return r;
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}
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#define arch_atomic64_dec_if_positive arch_atomic64_dec_if_positive
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#undef alternative_atomic64
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#undef __alternative_atomic64
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static __always_inline void arch_atomic64_and(s64 i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read_nonatomic(v);
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do { } while (!arch_atomic64_try_cmpxchg(v, &val, val & i));
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}
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static __always_inline s64 arch_atomic64_fetch_and(s64 i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read_nonatomic(v);
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do { } while (!arch_atomic64_try_cmpxchg(v, &val, val & i));
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return val;
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}
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#define arch_atomic64_fetch_and arch_atomic64_fetch_and
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static __always_inline void arch_atomic64_or(s64 i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read_nonatomic(v);
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do { } while (!arch_atomic64_try_cmpxchg(v, &val, val | i));
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}
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static __always_inline s64 arch_atomic64_fetch_or(s64 i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read_nonatomic(v);
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do { } while (!arch_atomic64_try_cmpxchg(v, &val, val | i));
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return val;
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}
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#define arch_atomic64_fetch_or arch_atomic64_fetch_or
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static __always_inline void arch_atomic64_xor(s64 i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read_nonatomic(v);
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do { } while (!arch_atomic64_try_cmpxchg(v, &val, val ^ i));
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}
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static __always_inline s64 arch_atomic64_fetch_xor(s64 i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read_nonatomic(v);
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do { } while (!arch_atomic64_try_cmpxchg(v, &val, val ^ i));
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return val;
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}
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#define arch_atomic64_fetch_xor arch_atomic64_fetch_xor
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static __always_inline s64 arch_atomic64_fetch_add(s64 i, atomic64_t *v)
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{
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s64 val = arch_atomic64_read_nonatomic(v);
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do { } while (!arch_atomic64_try_cmpxchg(v, &val, val + i));
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return val;
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}
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#define arch_atomic64_fetch_add arch_atomic64_fetch_add
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#define arch_atomic64_fetch_sub(i, v) arch_atomic64_fetch_add(-(i), (v))
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#endif /* _ASM_X86_ATOMIC64_32_H */
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