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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/arch/x86/kernel/cpu/mtrr/legacy.c
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// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/syscore_ops.h>
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#include <asm/cpufeature.h>
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#include <asm/mtrr.h>
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#include <asm/processor.h>
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#include "mtrr.h"
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void mtrr_set_if(void)
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{
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switch (boot_cpu_data.x86_vendor) {
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case X86_VENDOR_AMD:
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/* Pre-Athlon (K6) AMD CPU MTRRs */
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if (cpu_feature_enabled(X86_FEATURE_K6_MTRR))
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mtrr_if = &amd_mtrr_ops;
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break;
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case X86_VENDOR_CENTAUR:
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if (cpu_feature_enabled(X86_FEATURE_CENTAUR_MCR))
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mtrr_if = &centaur_mtrr_ops;
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break;
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case X86_VENDOR_CYRIX:
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if (cpu_feature_enabled(X86_FEATURE_CYRIX_ARR))
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mtrr_if = &cyrix_mtrr_ops;
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break;
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default:
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break;
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}
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}
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/*
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* The suspend/resume methods are only for CPUs without MTRR. CPUs using generic
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* MTRR driver don't require this.
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*/
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struct mtrr_value {
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mtrr_type ltype;
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unsigned long lbase;
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unsigned long lsize;
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};
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static struct mtrr_value *mtrr_value;
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static int mtrr_save(void)
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{
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int i;
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if (!mtrr_value)
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return -ENOMEM;
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for (i = 0; i < num_var_ranges; i++) {
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mtrr_if->get(i, &mtrr_value[i].lbase,
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&mtrr_value[i].lsize,
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&mtrr_value[i].ltype);
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}
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return 0;
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}
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static void mtrr_restore(void)
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{
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int i;
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for (i = 0; i < num_var_ranges; i++) {
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if (mtrr_value[i].lsize) {
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mtrr_if->set(i, mtrr_value[i].lbase,
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mtrr_value[i].lsize,
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mtrr_value[i].ltype);
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}
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}
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}
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static struct syscore_ops mtrr_syscore_ops = {
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.suspend = mtrr_save,
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.resume = mtrr_restore,
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};
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void mtrr_register_syscore(void)
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{
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mtrr_value = kcalloc(num_var_ranges, sizeof(*mtrr_value), GFP_KERNEL);
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/*
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* The CPU has no MTRR and seems to not support SMP. They have
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* specific drivers, we use a tricky method to support
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* suspend/resume for them.
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*
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* TBD: is there any system with such CPU which supports
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* suspend/resume? If no, we should remove the code.
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*/
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register_syscore_ops(&mtrr_syscore_ops);
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}
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