// SPDX-License-Identifier: GPL-2.0-only1/*2* imr.c -- Intel Isolated Memory Region driver3*4* Copyright(c) 2013 Intel Corporation.5* Copyright(c) 2015 Bryan O'Donoghue <[email protected]>6*7* IMR registers define an isolated region of memory that can8* be masked to prohibit certain system agents from accessing memory.9* When a device behind a masked port performs an access - snooped or10* not, an IMR may optionally prevent that transaction from changing11* the state of memory or from getting correct data in response to the12* operation.13*14* Write data will be dropped and reads will return 0xFFFFFFFF, the15* system will reset and system BIOS will print out an error message to16* inform the user that an IMR has been violated.17*18* This code is based on the Linux MTRR code and reference code from19* Intel's Quark BSP EFI, Linux and grub code.20*21* See quark-x1000-datasheet.pdf for register definitions.22* http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/quark-x1000-datasheet.pdf23*/2425#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt2627#include <asm-generic/sections.h>28#include <asm/cpu_device_id.h>29#include <asm/imr.h>30#include <asm/iosf_mbi.h>31#include <asm/io.h>3233#include <linux/debugfs.h>34#include <linux/init.h>35#include <linux/mm.h>36#include <linux/types.h>3738struct imr_device {39bool init;40struct mutex lock;41int max_imr;42int reg_base;43};4445static struct imr_device imr_dev;4647/*48* IMR read/write mask control registers.49* See quark-x1000-datasheet.pdf sections 12.7.4.5 and 12.7.4.6 for50* bit definitions.51*52* addr_hi53* 31 Lock bit54* 30:24 Reserved55* 23:2 1 KiB aligned lo address56* 1:0 Reserved57*58* addr_hi59* 31:24 Reserved60* 23:2 1 KiB aligned hi address61* 1:0 Reserved62*/63#define IMR_LOCK BIT(31)6465struct imr_regs {66u32 addr_lo;67u32 addr_hi;68u32 rmask;69u32 wmask;70};7172#define IMR_NUM_REGS (sizeof(struct imr_regs)/sizeof(u32))73#define IMR_SHIFT 874#define imr_to_phys(x) ((x) << IMR_SHIFT)75#define phys_to_imr(x) ((x) >> IMR_SHIFT)7677/**78* imr_is_enabled - true if an IMR is enabled false otherwise.79*80* Determines if an IMR is enabled based on address range and read/write81* mask. An IMR set with an address range set to zero and a read/write82* access mask set to all is considered to be disabled. An IMR in any83* other state - for example set to zero but without read/write access84* all is considered to be enabled. This definition of disabled is how85* firmware switches off an IMR and is maintained in kernel for86* consistency.87*88* @imr: pointer to IMR descriptor.89* @return: true if IMR enabled false if disabled.90*/91static inline int imr_is_enabled(struct imr_regs *imr)92{93return !(imr->rmask == IMR_READ_ACCESS_ALL &&94imr->wmask == IMR_WRITE_ACCESS_ALL &&95imr_to_phys(imr->addr_lo) == 0 &&96imr_to_phys(imr->addr_hi) == 0);97}9899/**100* imr_read - read an IMR at a given index.101*102* Requires caller to hold imr mutex.103*104* @idev: pointer to imr_device structure.105* @imr_id: IMR entry to read.106* @imr: IMR structure representing address and access masks.107* @return: 0 on success or error code passed from mbi_iosf on failure.108*/109static int imr_read(struct imr_device *idev, u32 imr_id, struct imr_regs *imr)110{111u32 reg = imr_id * IMR_NUM_REGS + idev->reg_base;112int ret;113114ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->addr_lo);115if (ret)116return ret;117118ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->addr_hi);119if (ret)120return ret;121122ret = iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->rmask);123if (ret)124return ret;125126return iosf_mbi_read(QRK_MBI_UNIT_MM, MBI_REG_READ, reg++, &imr->wmask);127}128129/**130* imr_write - write an IMR at a given index.131*132* Requires caller to hold imr mutex.133* Note lock bits need to be written independently of address bits.134*135* @idev: pointer to imr_device structure.136* @imr_id: IMR entry to write.137* @imr: IMR structure representing address and access masks.138* @return: 0 on success or error code passed from mbi_iosf on failure.139*/140static int imr_write(struct imr_device *idev, u32 imr_id, struct imr_regs *imr)141{142unsigned long flags;143u32 reg = imr_id * IMR_NUM_REGS + idev->reg_base;144int ret;145146local_irq_save(flags);147148ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->addr_lo);149if (ret)150goto failed;151152ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->addr_hi);153if (ret)154goto failed;155156ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->rmask);157if (ret)158goto failed;159160ret = iosf_mbi_write(QRK_MBI_UNIT_MM, MBI_REG_WRITE, reg++, imr->wmask);161if (ret)162goto failed;163164local_irq_restore(flags);165return 0;166failed:167/*168* If writing to the IOSF failed then we're in an unknown state,169* likely a very bad state. An IMR in an invalid state will almost170* certainly lead to a memory access violation.171*/172local_irq_restore(flags);173WARN(ret, "IOSF-MBI write fail range 0x%08x-0x%08x unreliable\n",174imr_to_phys(imr->addr_lo), imr_to_phys(imr->addr_hi) + IMR_MASK);175176return ret;177}178179/**180* imr_dbgfs_state_show - print state of IMR registers.181*182* @s: pointer to seq_file for output.183* @unused: unused parameter.184* @return: 0 on success or error code passed from mbi_iosf on failure.185*/186static int imr_dbgfs_state_show(struct seq_file *s, void *unused)187{188phys_addr_t base;189phys_addr_t end;190int i;191struct imr_device *idev = s->private;192struct imr_regs imr;193size_t size;194int ret = -ENODEV;195196mutex_lock(&idev->lock);197198for (i = 0; i < idev->max_imr; i++) {199200ret = imr_read(idev, i, &imr);201if (ret)202break;203204/*205* Remember to add IMR_ALIGN bytes to size to indicate the206* inherent IMR_ALIGN size bytes contained in the masked away207* lower ten bits.208*/209if (imr_is_enabled(&imr)) {210base = imr_to_phys(imr.addr_lo);211end = imr_to_phys(imr.addr_hi) + IMR_MASK;212size = end - base + 1;213} else {214base = 0;215end = 0;216size = 0;217}218seq_printf(s, "imr%02i: base=%pa, end=%pa, size=0x%08zx "219"rmask=0x%08x, wmask=0x%08x, %s, %s\n", i,220&base, &end, size, imr.rmask, imr.wmask,221imr_is_enabled(&imr) ? "enabled " : "disabled",222imr.addr_lo & IMR_LOCK ? "locked" : "unlocked");223}224225mutex_unlock(&idev->lock);226return ret;227}228DEFINE_SHOW_ATTRIBUTE(imr_dbgfs_state);229230/**231* imr_debugfs_register - register debugfs hooks.232*233* @idev: pointer to imr_device structure.234*/235static void imr_debugfs_register(struct imr_device *idev)236{237debugfs_create_file("imr_state", 0444, NULL, idev,238&imr_dbgfs_state_fops);239}240241/**242* imr_check_params - check passed address range IMR alignment and non-zero size243*244* @base: base address of intended IMR.245* @size: size of intended IMR.246* @return: zero on valid range -EINVAL on unaligned base/size.247*/248static int imr_check_params(phys_addr_t base, size_t size)249{250if ((base & IMR_MASK) || (size & IMR_MASK)) {251pr_err("base %pa size 0x%08zx must align to 1KiB\n",252&base, size);253return -EINVAL;254}255if (size == 0)256return -EINVAL;257258return 0;259}260261/**262* imr_raw_size - account for the IMR_ALIGN bytes that addr_hi appends.263*264* IMR addr_hi has a built in offset of plus IMR_ALIGN (0x400) bytes from the265* value in the register. We need to subtract IMR_ALIGN bytes from input sizes266* as a result.267*268* @size: input size bytes.269* @return: reduced size.270*/271static inline size_t imr_raw_size(size_t size)272{273return size - IMR_ALIGN;274}275276/**277* imr_address_overlap - detects an address overlap.278*279* @addr: address to check against an existing IMR.280* @imr: imr being checked.281* @return: true for overlap false for no overlap.282*/283static inline int imr_address_overlap(phys_addr_t addr, struct imr_regs *imr)284{285return addr >= imr_to_phys(imr->addr_lo) && addr <= imr_to_phys(imr->addr_hi);286}287288/**289* imr_add_range - add an Isolated Memory Region.290*291* @base: physical base address of region aligned to 1KiB.292* @size: physical size of region in bytes must be aligned to 1KiB.293* @read_mask: read access mask.294* @write_mask: write access mask.295* @return: zero on success or negative value indicating error.296*/297int imr_add_range(phys_addr_t base, size_t size,298unsigned int rmask, unsigned int wmask)299{300phys_addr_t end;301unsigned int i;302struct imr_device *idev = &imr_dev;303struct imr_regs imr;304size_t raw_size;305int reg;306int ret;307308if (WARN_ONCE(idev->init == false, "driver not initialized"))309return -ENODEV;310311ret = imr_check_params(base, size);312if (ret)313return ret;314315/* Tweak the size value. */316raw_size = imr_raw_size(size);317end = base + raw_size;318319/*320* Check for reserved IMR value common to firmware, kernel and grub321* indicating a disabled IMR.322*/323imr.addr_lo = phys_to_imr(base);324imr.addr_hi = phys_to_imr(end);325imr.rmask = rmask;326imr.wmask = wmask;327if (!imr_is_enabled(&imr))328return -ENOTSUPP;329330mutex_lock(&idev->lock);331332/*333* Find a free IMR while checking for an existing overlapping range.334* Note there's no restriction in silicon to prevent IMR overlaps.335* For the sake of simplicity and ease in defining/debugging an IMR336* memory map we exclude IMR overlaps.337*/338reg = -1;339for (i = 0; i < idev->max_imr; i++) {340ret = imr_read(idev, i, &imr);341if (ret)342goto failed;343344/* Find overlap @ base or end of requested range. */345ret = -EINVAL;346if (imr_is_enabled(&imr)) {347if (imr_address_overlap(base, &imr))348goto failed;349if (imr_address_overlap(end, &imr))350goto failed;351} else {352reg = i;353}354}355356/* Error out if we have no free IMR entries. */357if (reg == -1) {358ret = -ENOMEM;359goto failed;360}361362pr_debug("add %d phys %pa-%pa size %zx mask 0x%08x wmask 0x%08x\n",363reg, &base, &end, raw_size, rmask, wmask);364365/* Enable IMR at specified range and access mask. */366imr.addr_lo = phys_to_imr(base);367imr.addr_hi = phys_to_imr(end);368imr.rmask = rmask;369imr.wmask = wmask;370371ret = imr_write(idev, reg, &imr);372if (ret < 0) {373/*374* In the highly unlikely event iosf_mbi_write failed375* attempt to rollback the IMR setup skipping the trapping376* of further IOSF write failures.377*/378imr.addr_lo = 0;379imr.addr_hi = 0;380imr.rmask = IMR_READ_ACCESS_ALL;381imr.wmask = IMR_WRITE_ACCESS_ALL;382imr_write(idev, reg, &imr);383}384failed:385mutex_unlock(&idev->lock);386return ret;387}388EXPORT_SYMBOL_GPL(imr_add_range);389390/**391* __imr_remove_range - delete an Isolated Memory Region.392*393* This function allows you to delete an IMR by its index specified by reg or394* by address range specified by base and size respectively. If you specify an395* index on its own the base and size parameters are ignored.396* imr_remove_range(0, base, size); delete IMR at index 0 base/size ignored.397* imr_remove_range(-1, base, size); delete IMR from base to base+size.398*399* @reg: imr index to remove.400* @base: physical base address of region aligned to 1 KiB.401* @size: physical size of region in bytes aligned to 1 KiB.402* @return: -EINVAL on invalid range or out or range id403* -ENODEV if reg is valid but no IMR exists or is locked404* 0 on success.405*/406static int __imr_remove_range(int reg, phys_addr_t base, size_t size)407{408phys_addr_t end;409bool found = false;410unsigned int i;411struct imr_device *idev = &imr_dev;412struct imr_regs imr;413size_t raw_size;414int ret = 0;415416if (WARN_ONCE(idev->init == false, "driver not initialized"))417return -ENODEV;418419/*420* Validate address range if deleting by address, else we are421* deleting by index where base and size will be ignored.422*/423if (reg == -1) {424ret = imr_check_params(base, size);425if (ret)426return ret;427}428429/* Tweak the size value. */430raw_size = imr_raw_size(size);431end = base + raw_size;432433mutex_lock(&idev->lock);434435if (reg >= 0) {436/* If a specific IMR is given try to use it. */437ret = imr_read(idev, reg, &imr);438if (ret)439goto failed;440441if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK) {442ret = -ENODEV;443goto failed;444}445found = true;446} else {447/* Search for match based on address range. */448for (i = 0; i < idev->max_imr; i++) {449ret = imr_read(idev, i, &imr);450if (ret)451goto failed;452453if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK)454continue;455456if ((imr_to_phys(imr.addr_lo) == base) &&457(imr_to_phys(imr.addr_hi) == end)) {458found = true;459reg = i;460break;461}462}463}464465if (!found) {466ret = -ENODEV;467goto failed;468}469470pr_debug("remove %d phys %pa-%pa size %zx\n", reg, &base, &end, raw_size);471472/* Tear down the IMR. */473imr.addr_lo = 0;474imr.addr_hi = 0;475imr.rmask = IMR_READ_ACCESS_ALL;476imr.wmask = IMR_WRITE_ACCESS_ALL;477478ret = imr_write(idev, reg, &imr);479480failed:481mutex_unlock(&idev->lock);482return ret;483}484485/**486* imr_remove_range - delete an Isolated Memory Region by address487*488* This function allows you to delete an IMR by an address range specified489* by base and size respectively.490* imr_remove_range(base, size); delete IMR from base to base+size.491*492* @base: physical base address of region aligned to 1 KiB.493* @size: physical size of region in bytes aligned to 1 KiB.494* @return: -EINVAL on invalid range or out or range id495* -ENODEV if reg is valid but no IMR exists or is locked496* 0 on success.497*/498int imr_remove_range(phys_addr_t base, size_t size)499{500return __imr_remove_range(-1, base, size);501}502EXPORT_SYMBOL_GPL(imr_remove_range);503504/**505* imr_clear - delete an Isolated Memory Region by index506*507* This function allows you to delete an IMR by an address range specified508* by the index of the IMR. Useful for initial sanitization of the IMR509* address map.510* imr_ge(base, size); delete IMR from base to base+size.511*512* @reg: imr index to remove.513* @return: -EINVAL on invalid range or out or range id514* -ENODEV if reg is valid but no IMR exists or is locked515* 0 on success.516*/517static inline int imr_clear(int reg)518{519return __imr_remove_range(reg, 0, 0);520}521522/**523* imr_fixup_memmap - Tear down IMRs used during bootup.524*525* BIOS and Grub both setup IMRs around compressed kernel, initrd memory526* that need to be removed before the kernel hands out one of the IMR527* encased addresses to a downstream DMA agent such as the SD or Ethernet.528* IMRs on Galileo are setup to immediately reset the system on violation.529* As a result if you're running a root filesystem from SD - you'll need530* the boot-time IMRs torn down or you'll find seemingly random resets when531* using your filesystem.532*533* @idev: pointer to imr_device structure.534* @return:535*/536static void __init imr_fixup_memmap(struct imr_device *idev)537{538phys_addr_t base = virt_to_phys(&_text);539size_t size = virt_to_phys(&__end_rodata) - base;540unsigned long start, end;541int i;542int ret;543544/* Tear down all existing unlocked IMRs. */545for (i = 0; i < idev->max_imr; i++)546imr_clear(i);547548start = (unsigned long)_text;549end = (unsigned long)__end_rodata - 1;550551/*552* Setup an unlocked IMR around the physical extent of the kernel553* from the beginning of the .text section to the end of the554* .rodata section as one physically contiguous block.555*556* We don't round up @size since it is already PAGE_SIZE aligned.557* See vmlinux.lds.S for details.558*/559ret = imr_add_range(base, size, IMR_CPU, IMR_CPU);560if (ret < 0) {561pr_err("unable to setup IMR for kernel: %zu KiB (%lx - %lx)\n",562size / 1024, start, end);563} else {564pr_info("protecting kernel .text - .rodata: %zu KiB (%lx - %lx)\n",565size / 1024, start, end);566}567568}569570static const struct x86_cpu_id imr_ids[] __initconst = {571X86_MATCH_VFM(INTEL_QUARK_X1000, NULL),572{}573};574575/**576* imr_init - entry point for IMR driver.577*578* return: -ENODEV for no IMR support 0 if good to go.579*/580static int __init imr_init(void)581{582struct imr_device *idev = &imr_dev;583584if (!x86_match_cpu(imr_ids) || !iosf_mbi_available())585return -ENODEV;586587idev->max_imr = QUARK_X1000_IMR_MAX;588idev->reg_base = QUARK_X1000_IMR_REGBASE;589idev->init = true;590591mutex_init(&idev->lock);592imr_debugfs_register(idev);593imr_fixup_memmap(idev);594return 0;595}596device_initcall(imr_init);597598599