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torvalds
GitHub Repository: torvalds/linux
Path: blob/master/arch/x86/platform/pvh/head.S
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright C 2016, Oracle and/or its affiliates. All rights reserved.
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*/
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.code32
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.text
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#ifdef CONFIG_X86_32
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#define _pa(x) ((x) - __START_KERNEL_map)
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#endif
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#define rva(x) ((x) - pvh_start_xen)
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#include <linux/elfnote.h>
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <asm/desc_defs.h>
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#include <asm/segment.h>
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#include <asm/asm.h>
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#include <asm/boot.h>
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#include <asm/pgtable.h>
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#include <asm/processor-flags.h>
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#include <asm/msr.h>
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#include <asm/nospec-branch.h>
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#include <xen/interface/elfnote.h>
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__HEAD
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/*
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* Entry point for PVH guests.
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*
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* Xen ABI specifies the following register state when we come here:
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*
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* - `ebx`: contains the physical memory address where the loader has placed
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* the boot start info structure.
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* - `cr0`: bit 0 (PE) must be set. All the other writeable bits are cleared.
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* - `cr4`: all bits are cleared.
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* - `cs `: must be a 32-bit read/execute code segment with a base of `0`
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* and a limit of `0xFFFFFFFF`. The selector value is unspecified.
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* - `ds`, `es`: must be a 32-bit read/write data segment with a base of
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* `0` and a limit of `0xFFFFFFFF`. The selector values are all
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* unspecified.
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* - `tr`: must be a 32-bit TSS (active) with a base of '0' and a limit
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* of '0x67'.
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* - `eflags`: bit 17 (VM) must be cleared. Bit 9 (IF) must be cleared.
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* Bit 8 (TF) must be cleared. Other bits are all unspecified.
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*
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* All other processor registers and flag bits are unspecified. The OS is in
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* charge of setting up its own stack, GDT and IDT.
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*/
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#define PVH_GDT_ENTRY_CS 1
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#define PVH_GDT_ENTRY_DS 2
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#define PVH_CS_SEL (PVH_GDT_ENTRY_CS * 8)
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#define PVH_DS_SEL (PVH_GDT_ENTRY_DS * 8)
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SYM_CODE_START(pvh_start_xen)
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UNWIND_HINT_END_OF_STACK
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cld
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/*
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* See the comment for startup_32 for more details. We need to
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* execute a call to get the execution address to be position
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* independent, but we don't have a stack. Save and restore the
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* magic field of start_info in ebx, and use that as the stack.
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*/
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mov (%ebx), %eax
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leal 4(%ebx), %esp
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ANNOTATE_INTRA_FUNCTION_CALL
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call 1f
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1: popl %ebp
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mov %eax, (%ebx)
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subl $rva(1b), %ebp
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movl $0, %esp
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leal rva(gdt)(%ebp), %eax
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addl %eax, 2(%eax)
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lgdt (%eax)
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mov $PVH_DS_SEL,%eax
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mov %eax,%ds
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mov %eax,%es
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mov %eax,%ss
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/* Stash hvm_start_info. */
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leal rva(pvh_start_info)(%ebp), %edi
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mov %ebx, %esi
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movl rva(pvh_start_info_sz)(%ebp), %ecx
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shr $2,%ecx
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rep movsl
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leal rva(early_stack_end)(%ebp), %esp
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/* Enable PAE mode. */
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mov %cr4, %eax
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orl $X86_CR4_PAE, %eax
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mov %eax, %cr4
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#ifdef CONFIG_X86_64
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/* Enable Long mode. */
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mov $MSR_EFER, %ecx
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rdmsr
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btsl $_EFER_LME, %eax
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wrmsr
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/*
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* Reuse the non-relocatable symbol emitted for the ELF note to
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* subtract the build time physical address of pvh_start_xen() from
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* its actual runtime address, without relying on absolute 32-bit ELF
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* relocations, as these are not supported by the linker when running
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* in -pie mode, and should be avoided in .head.text in general.
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*/
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mov %ebp, %ebx
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subl rva(xen_elfnote_phys32_entry)(%ebp), %ebx
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jz .Lpagetable_done
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/*
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* Store the resulting load offset in phys_base. __pa() needs
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* phys_base set to calculate the hypercall page in xen_pvh_init().
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*/
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movl %ebx, rva(phys_base)(%ebp)
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/* Fixup page-tables for relocation. */
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leal rva(pvh_init_top_pgt)(%ebp), %edi
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movl $PTRS_PER_PGD, %ecx
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2:
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testl $_PAGE_PRESENT, 0x00(%edi)
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jz 1f
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addl %ebx, 0x00(%edi)
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1:
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addl $8, %edi
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decl %ecx
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jnz 2b
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/* L3 ident has a single entry. */
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leal rva(pvh_level3_ident_pgt)(%ebp), %edi
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addl %ebx, 0x00(%edi)
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leal rva(pvh_level3_kernel_pgt)(%ebp), %edi
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addl %ebx, (PAGE_SIZE - 16)(%edi)
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addl %ebx, (PAGE_SIZE - 8)(%edi)
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/* pvh_level2_ident_pgt is fine - large pages */
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/* pvh_level2_kernel_pgt needs adjustment - large pages */
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leal rva(pvh_level2_kernel_pgt)(%ebp), %edi
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movl $PTRS_PER_PMD, %ecx
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2:
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testl $_PAGE_PRESENT, 0x00(%edi)
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jz 1f
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addl %ebx, 0x00(%edi)
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1:
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addl $8, %edi
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decl %ecx
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jnz 2b
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.Lpagetable_done:
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/* Enable pre-constructed page tables. */
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leal rva(pvh_init_top_pgt)(%ebp), %eax
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mov %eax, %cr3
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mov $(X86_CR0_PG | X86_CR0_PE), %eax
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mov %eax, %cr0
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/* Jump to 64-bit mode. */
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pushl $PVH_CS_SEL
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leal rva(1f)(%ebp), %eax
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pushl %eax
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lretl
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/* 64-bit entry point. */
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.code64
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1:
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UNWIND_HINT_END_OF_STACK
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/*
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* Set up GSBASE.
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* Note that on SMP the boot CPU uses the init data section until
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* the per-CPU areas are set up.
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*/
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movl $MSR_GS_BASE,%ecx
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xorl %eax, %eax
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xorl %edx, %edx
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wrmsr
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/* Call xen_prepare_pvh() via the kernel virtual mapping */
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leaq xen_prepare_pvh(%rip), %rax
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subq phys_base(%rip), %rax
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addq $__START_KERNEL_map, %rax
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ANNOTATE_RETPOLINE_SAFE
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call *%rax
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/* startup_64 expects boot_params in %rsi. */
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lea pvh_bootparams(%rip), %rsi
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jmp startup_64
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#else /* CONFIG_X86_64 */
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call mk_early_pgtbl_32
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mov $_pa(initial_page_table), %eax
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mov %eax, %cr3
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mov %cr0, %eax
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or $(X86_CR0_PG | X86_CR0_PE), %eax
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mov %eax, %cr0
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ljmp $PVH_CS_SEL, $1f
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1:
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call xen_prepare_pvh
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mov $_pa(pvh_bootparams), %esi
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/* startup_32 doesn't expect paging and PAE to be on. */
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ljmp $PVH_CS_SEL, $_pa(2f)
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2:
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mov %cr0, %eax
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and $~X86_CR0_PG, %eax
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mov %eax, %cr0
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mov %cr4, %eax
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and $~X86_CR4_PAE, %eax
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mov %eax, %cr4
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ljmp $PVH_CS_SEL, $_pa(startup_32)
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#endif
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SYM_CODE_END(pvh_start_xen)
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.section ".init.data","aw"
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.balign 8
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SYM_DATA_START_LOCAL(gdt)
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.word gdt_end - gdt_start - 1
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.long gdt_start - gdt
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.word 0
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SYM_DATA_END(gdt)
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SYM_DATA_START_LOCAL(gdt_start)
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.quad 0x0000000000000000 /* NULL descriptor */
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#ifdef CONFIG_X86_64
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.quad GDT_ENTRY(DESC_CODE64, 0, 0xfffff) /* PVH_CS_SEL */
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#else
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.quad GDT_ENTRY(DESC_CODE32, 0, 0xfffff) /* PVH_CS_SEL */
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#endif
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.quad GDT_ENTRY(DESC_DATA32, 0, 0xfffff) /* PVH_DS_SEL */
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SYM_DATA_END_LABEL(gdt_start, SYM_L_LOCAL, gdt_end)
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.balign 16
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SYM_DATA_START_LOCAL(early_stack)
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.fill BOOT_STACK_SIZE, 1, 0
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SYM_DATA_END_LABEL(early_stack, SYM_L_LOCAL, early_stack_end)
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#ifdef CONFIG_X86_64
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/*
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* Xen PVH needs a set of identity mapped and kernel high mapping
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* page tables. pvh_start_xen starts running on the identity mapped
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* page tables, but xen_prepare_pvh calls into the high mapping.
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* These page tables need to be relocatable and are only used until
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* startup_64 transitions to init_top_pgt.
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*/
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SYM_DATA_START_PAGE_ALIGNED(pvh_init_top_pgt)
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.quad pvh_level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
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.org pvh_init_top_pgt + L4_PAGE_OFFSET * 8, 0
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.quad pvh_level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
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.org pvh_init_top_pgt + L4_START_KERNEL * 8, 0
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/* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
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.quad pvh_level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
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SYM_DATA_END(pvh_init_top_pgt)
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SYM_DATA_START_PAGE_ALIGNED(pvh_level3_ident_pgt)
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.quad pvh_level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
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.fill 511, 8, 0
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SYM_DATA_END(pvh_level3_ident_pgt)
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SYM_DATA_START_PAGE_ALIGNED(pvh_level2_ident_pgt)
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/*
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* Since I easily can, map the first 1G.
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* Don't set NX because code runs from these pages.
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*
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* Note: This sets _PAGE_GLOBAL despite whether
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* the CPU supports it or it is enabled. But,
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* the CPU should ignore the bit.
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*/
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PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
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SYM_DATA_END(pvh_level2_ident_pgt)
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SYM_DATA_START_PAGE_ALIGNED(pvh_level3_kernel_pgt)
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.fill L3_START_KERNEL, 8, 0
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/* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */
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.quad pvh_level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
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.quad 0 /* no fixmap */
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SYM_DATA_END(pvh_level3_kernel_pgt)
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SYM_DATA_START_PAGE_ALIGNED(pvh_level2_kernel_pgt)
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/*
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* Kernel high mapping.
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*
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* The kernel code+data+bss must be located below KERNEL_IMAGE_SIZE in
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* virtual address space, which is 1 GiB if RANDOMIZE_BASE is enabled,
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* 512 MiB otherwise.
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*
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* (NOTE: after that starts the module area, see MODULES_VADDR.)
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*
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* This table is eventually used by the kernel during normal runtime.
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* Care must be taken to clear out undesired bits later, like _PAGE_RW
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* or _PAGE_GLOBAL in some cases.
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*/
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PMDS(0, __PAGE_KERNEL_LARGE_EXEC, KERNEL_IMAGE_SIZE / PMD_SIZE)
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SYM_DATA_END(pvh_level2_kernel_pgt)
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ELFNOTE(Xen, XEN_ELFNOTE_PHYS32_RELOC,
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.long CONFIG_PHYSICAL_ALIGN;
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.long LOAD_PHYSICAL_ADDR;
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.long KERNEL_IMAGE_SIZE - 1)
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#endif
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ELFNOTE(Xen, XEN_ELFNOTE_PHYS32_ENTRY, .global xen_elfnote_phys32_entry;
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xen_elfnote_phys32_entry: _ASM_PTR xen_elfnote_phys32_entry_value - .)
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