Path: blob/master/drivers/accel/habanalabs/common/hw_queue.c
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// SPDX-License-Identifier: GPL-2.012/*3* Copyright 2016-2019 HabanaLabs, Ltd.4* All Rights Reserved.5*/67#include "habanalabs.h"89#include <linux/slab.h>1011/*12* hl_queue_add_ptr - add to pi or ci and checks if it wraps around13*14* @ptr: the current pi/ci value15* @val: the amount to add16*17* Add val to ptr. It can go until twice the queue length.18*/19inline u32 hl_hw_queue_add_ptr(u32 ptr, u16 val)20{21ptr += val;22ptr &= ((HL_QUEUE_LENGTH << 1) - 1);23return ptr;24}25static inline int queue_ci_get(atomic_t *ci, u32 queue_len)26{27return atomic_read(ci) & ((queue_len << 1) - 1);28}2930static inline int queue_free_slots(struct hl_hw_queue *q, u32 queue_len)31{32int delta = (q->pi - queue_ci_get(&q->ci, queue_len));3334if (delta >= 0)35return (queue_len - delta);36else37return (abs(delta) - queue_len);38}3940void hl_hw_queue_update_ci(struct hl_cs *cs)41{42struct hl_device *hdev = cs->ctx->hdev;43struct hl_hw_queue *q;44int i;4546if (hdev->disabled)47return;4849q = &hdev->kernel_queues[0];5051/* There are no internal queues if H/W queues are being used */52if (!hdev->asic_prop.max_queues || q->queue_type == QUEUE_TYPE_HW)53return;5455/* We must increment CI for every queue that will never get a56* completion, there are 2 scenarios this can happen:57* 1. All queues of a non completion CS will never get a completion.58* 2. Internal queues never gets completion.59*/60for (i = 0 ; i < hdev->asic_prop.max_queues ; i++, q++) {61if (!cs_needs_completion(cs) || q->queue_type == QUEUE_TYPE_INT)62atomic_add(cs->jobs_in_queue_cnt[i], &q->ci);63}64}6566/*67* hl_hw_queue_submit_bd() - Submit a buffer descriptor to an external or a68* H/W queue.69* @hdev: pointer to habanalabs device structure70* @q: pointer to habanalabs queue structure71* @ctl: BD's control word72* @len: BD's length73* @ptr: BD's pointer74*75* This function assumes there is enough space on the queue to submit a new76* BD to it. It initializes the next BD and calls the device specific77* function to set the pi (and doorbell)78*79* This function must be called when the scheduler mutex is taken80*81*/82void hl_hw_queue_submit_bd(struct hl_device *hdev, struct hl_hw_queue *q,83u32 ctl, u32 len, u64 ptr)84{85struct hl_bd *bd;86u64 addr;87int i;8889bd = q->kernel_address;90bd += hl_pi_2_offset(q->pi);91bd->ctl = cpu_to_le32(ctl);92bd->len = cpu_to_le32(len);93bd->ptr = cpu_to_le64(ptr);9495if (q->dram_bd)96for (i = 0 ; i < 2 ; i++) {97addr = q->pq_dram_address +98((hl_pi_2_offset(q->pi) * sizeof(struct hl_bd)) + (i * sizeof(u64)));99hdev->asic_funcs->access_dev_mem(hdev, PCI_REGION_DRAM, addr,100(u64 *)(bd) + i, DEBUGFS_WRITE64);101}102103q->pi = hl_queue_inc_ptr(q->pi);104105hdev->asic_funcs->ring_doorbell(hdev, q->hw_queue_id, q->pi);106}107108/*109* ext_queue_sanity_checks - perform some sanity checks on external queue110*111* @hdev : pointer to hl_device structure112* @q : pointer to hl_hw_queue structure113* @num_of_entries : how many entries to check for space114* @reserve_cq_entry : whether to reserve an entry in the cq115*116* H/W queues spinlock should be taken before calling this function117*118* Perform the following:119* - Make sure we have enough space in the h/w queue120* - Make sure we have enough space in the completion queue121* - Reserve space in the completion queue (needs to be reversed if there122* is a failure down the road before the actual submission of work). Only123* do this action if reserve_cq_entry is true124*125*/126static int ext_queue_sanity_checks(struct hl_device *hdev,127struct hl_hw_queue *q, int num_of_entries,128bool reserve_cq_entry)129{130atomic_t *free_slots =131&hdev->completion_queue[q->cq_id].free_slots_cnt;132int free_slots_cnt;133134/* Check we have enough space in the queue */135free_slots_cnt = queue_free_slots(q, HL_QUEUE_LENGTH);136137if (free_slots_cnt < num_of_entries) {138dev_dbg(hdev->dev, "Queue %d doesn't have room for %d CBs\n",139q->hw_queue_id, num_of_entries);140return -EAGAIN;141}142143if (reserve_cq_entry) {144/*145* Check we have enough space in the completion queue146* Add -1 to counter (decrement) unless counter was already 0147* In that case, CQ is full so we can't submit a new CB because148* we won't get ack on its completion149* atomic_add_unless will return 0 if counter was already 0150*/151if (atomic_add_negative(num_of_entries * -1, free_slots)) {152dev_dbg(hdev->dev, "No space for %d on CQ %d\n",153num_of_entries, q->hw_queue_id);154atomic_add(num_of_entries, free_slots);155return -EAGAIN;156}157}158159return 0;160}161162/*163* int_queue_sanity_checks - perform some sanity checks on internal queue164*165* @hdev : pointer to hl_device structure166* @q : pointer to hl_hw_queue structure167* @num_of_entries : how many entries to check for space168*169* H/W queues spinlock should be taken before calling this function170*171* Perform the following:172* - Make sure we have enough space in the h/w queue173*174*/175static int int_queue_sanity_checks(struct hl_device *hdev,176struct hl_hw_queue *q,177int num_of_entries)178{179int free_slots_cnt;180181if (num_of_entries > q->int_queue_len) {182dev_err(hdev->dev,183"Cannot populate queue %u with %u jobs\n",184q->hw_queue_id, num_of_entries);185return -ENOMEM;186}187188/* Check we have enough space in the queue */189free_slots_cnt = queue_free_slots(q, q->int_queue_len);190191if (free_slots_cnt < num_of_entries) {192dev_dbg(hdev->dev, "Queue %d doesn't have room for %d CBs\n",193q->hw_queue_id, num_of_entries);194return -EAGAIN;195}196197return 0;198}199200/*201* hw_queue_sanity_checks() - Make sure we have enough space in the h/w queue202* @hdev: Pointer to hl_device structure.203* @q: Pointer to hl_hw_queue structure.204* @num_of_entries: How many entries to check for space.205*206* Notice: We do not reserve queue entries so this function mustn't be called207* more than once per CS for the same queue208*209*/210static int hw_queue_sanity_checks(struct hl_device *hdev, struct hl_hw_queue *q,211int num_of_entries)212{213int free_slots_cnt;214215/* Check we have enough space in the queue */216free_slots_cnt = queue_free_slots(q, HL_QUEUE_LENGTH);217218if (free_slots_cnt < num_of_entries) {219dev_dbg(hdev->dev, "Queue %d doesn't have room for %d CBs\n",220q->hw_queue_id, num_of_entries);221return -EAGAIN;222}223224return 0;225}226227/*228* hl_hw_queue_send_cb_no_cmpl - send a single CB (not a JOB) without completion229*230* @hdev: pointer to hl_device structure231* @hw_queue_id: Queue's type232* @cb_size: size of CB233* @cb_ptr: pointer to CB location234*235* This function sends a single CB, that must NOT generate a completion entry.236* Sending CPU messages can be done instead via 'hl_hw_queue_submit_bd()'237*/238int hl_hw_queue_send_cb_no_cmpl(struct hl_device *hdev, u32 hw_queue_id,239u32 cb_size, u64 cb_ptr)240{241struct hl_hw_queue *q = &hdev->kernel_queues[hw_queue_id];242int rc = 0;243244hdev->asic_funcs->hw_queues_lock(hdev);245246if (hdev->disabled) {247rc = -EPERM;248goto out;249}250251/*252* hl_hw_queue_send_cb_no_cmpl() is called for queues of a H/W queue253* type only on init phase, when the queues are empty and being tested,254* so there is no need for sanity checks.255*/256if (q->queue_type != QUEUE_TYPE_HW) {257rc = ext_queue_sanity_checks(hdev, q, 1, false);258if (rc)259goto out;260}261262hl_hw_queue_submit_bd(hdev, q, 0, cb_size, cb_ptr);263264out:265hdev->asic_funcs->hw_queues_unlock(hdev);266267return rc;268}269270/*271* ext_queue_schedule_job - submit a JOB to an external queue272*273* @job: pointer to the job that needs to be submitted to the queue274*275* This function must be called when the scheduler mutex is taken276*277*/278static void ext_queue_schedule_job(struct hl_cs_job *job)279{280struct hl_device *hdev = job->cs->ctx->hdev;281struct hl_hw_queue *q = &hdev->kernel_queues[job->hw_queue_id];282struct hl_cq_entry cq_pkt;283struct hl_cq *cq;284u64 cq_addr;285struct hl_cb *cb;286u32 ctl;287u32 len;288u64 ptr;289290/*291* Update the JOB ID inside the BD CTL so the device would know what292* to write in the completion queue293*/294ctl = ((q->pi << BD_CTL_SHADOW_INDEX_SHIFT) & BD_CTL_SHADOW_INDEX_MASK);295296cb = job->patched_cb;297len = job->job_cb_size;298ptr = cb->bus_address;299300/* Skip completion flow in case this is a non completion CS */301if (!cs_needs_completion(job->cs))302goto submit_bd;303304cq_pkt.data = cpu_to_le32(305((q->pi << CQ_ENTRY_SHADOW_INDEX_SHIFT)306& CQ_ENTRY_SHADOW_INDEX_MASK) |307FIELD_PREP(CQ_ENTRY_SHADOW_INDEX_VALID_MASK, 1) |308FIELD_PREP(CQ_ENTRY_READY_MASK, 1));309310/*311* No need to protect pi_offset because scheduling to the312* H/W queues is done under the scheduler mutex313*314* No need to check if CQ is full because it was already315* checked in ext_queue_sanity_checks316*/317cq = &hdev->completion_queue[q->cq_id];318cq_addr = cq->bus_address + cq->pi * sizeof(struct hl_cq_entry);319320hdev->asic_funcs->add_end_of_cb_packets(hdev, cb->kernel_address, len,321job->user_cb_size,322cq_addr,323le32_to_cpu(cq_pkt.data),324q->msi_vec,325job->contains_dma_pkt);326327q->shadow_queue[hl_pi_2_offset(q->pi)] = job;328329cq->pi = hl_cq_inc_ptr(cq->pi);330331submit_bd:332hl_hw_queue_submit_bd(hdev, q, ctl, len, ptr);333}334335/*336* int_queue_schedule_job - submit a JOB to an internal queue337*338* @job: pointer to the job that needs to be submitted to the queue339*340* This function must be called when the scheduler mutex is taken341*342*/343static void int_queue_schedule_job(struct hl_cs_job *job)344{345struct hl_device *hdev = job->cs->ctx->hdev;346struct hl_hw_queue *q = &hdev->kernel_queues[job->hw_queue_id];347struct hl_bd bd;348__le64 *pi;349350bd.ctl = 0;351bd.len = cpu_to_le32(job->job_cb_size);352353if (job->is_kernel_allocated_cb)354/* bus_address is actually a mmu mapped address355* allocated from an internal pool356*/357bd.ptr = cpu_to_le64(job->user_cb->bus_address);358else359bd.ptr = cpu_to_le64((u64) (uintptr_t) job->user_cb);360361pi = q->kernel_address + (q->pi & (q->int_queue_len - 1)) * sizeof(bd);362363q->pi++;364q->pi &= ((q->int_queue_len << 1) - 1);365366hdev->asic_funcs->pqe_write(hdev, pi, &bd);367368hdev->asic_funcs->ring_doorbell(hdev, q->hw_queue_id, q->pi);369}370371/*372* hw_queue_schedule_job - submit a JOB to a H/W queue373*374* @job: pointer to the job that needs to be submitted to the queue375*376* This function must be called when the scheduler mutex is taken377*378*/379static void hw_queue_schedule_job(struct hl_cs_job *job)380{381struct hl_device *hdev = job->cs->ctx->hdev;382struct hl_hw_queue *q = &hdev->kernel_queues[job->hw_queue_id];383u64 ptr;384u32 offset, ctl, len;385386/*387* Upon PQE completion, COMP_DATA is used as the write data to the388* completion queue (QMAN HBW message), and COMP_OFFSET is used as the389* write address offset in the SM block (QMAN LBW message).390* The write address offset is calculated as "COMP_OFFSET << 2".391*/392offset = job->cs->sequence & (hdev->asic_prop.max_pending_cs - 1);393ctl = ((offset << BD_CTL_COMP_OFFSET_SHIFT) & BD_CTL_COMP_OFFSET_MASK) |394((q->pi << BD_CTL_COMP_DATA_SHIFT) & BD_CTL_COMP_DATA_MASK);395396len = job->job_cb_size;397398/*399* A patched CB is created only if a user CB was allocated by driver and400* MMU is disabled. If MMU is enabled, the user CB should be used401* instead. If the user CB wasn't allocated by driver, assume that it402* holds an address.403*/404if (job->patched_cb)405ptr = job->patched_cb->bus_address;406else if (job->is_kernel_allocated_cb)407ptr = job->user_cb->bus_address;408else409ptr = (u64) (uintptr_t) job->user_cb;410411hl_hw_queue_submit_bd(hdev, q, ctl, len, ptr);412}413414static int init_signal_cs(struct hl_device *hdev,415struct hl_cs_job *job, struct hl_cs_compl *cs_cmpl)416{417struct hl_sync_stream_properties *prop;418struct hl_hw_sob *hw_sob;419u32 q_idx;420int rc = 0;421422q_idx = job->hw_queue_id;423prop = &hdev->kernel_queues[q_idx].sync_stream_prop;424hw_sob = &prop->hw_sob[prop->curr_sob_offset];425426cs_cmpl->hw_sob = hw_sob;427cs_cmpl->sob_val = prop->next_sob_val;428429dev_dbg(hdev->dev,430"generate signal CB, sob_id: %d, sob val: %u, q_idx: %d, seq: %llu\n",431cs_cmpl->hw_sob->sob_id, cs_cmpl->sob_val, q_idx,432cs_cmpl->cs_seq);433434/* we set an EB since we must make sure all oeprations are done435* when sending the signal436*/437hdev->asic_funcs->gen_signal_cb(hdev, job->patched_cb,438cs_cmpl->hw_sob->sob_id, 0, true);439440rc = hl_cs_signal_sob_wraparound_handler(hdev, q_idx, &hw_sob, 1,441false);442443job->cs->sob_addr_offset = hw_sob->sob_addr;444job->cs->initial_sob_count = prop->next_sob_val - 1;445446return rc;447}448449void hl_hw_queue_encaps_sig_set_sob_info(struct hl_device *hdev,450struct hl_cs *cs, struct hl_cs_job *job,451struct hl_cs_compl *cs_cmpl)452{453struct hl_cs_encaps_sig_handle *handle = cs->encaps_sig_hdl;454u32 offset = 0;455456cs_cmpl->hw_sob = handle->hw_sob;457458/* Note that encaps_sig_wait_offset was validated earlier in the flow459* for offset value which exceeds the max reserved signal count.460* always decrement 1 of the offset since when the user461* set offset 1 for example he mean to wait only for the first462* signal only, which will be pre_sob_val, and if he set offset 2463* then the value required is (pre_sob_val + 1) and so on...464* if user set wait offset to 0, then treat it as legacy wait cs,465* wait for the next signal.466*/467if (job->encaps_sig_wait_offset)468offset = job->encaps_sig_wait_offset - 1;469470cs_cmpl->sob_val = handle->pre_sob_val + offset;471}472473static int init_wait_cs(struct hl_device *hdev, struct hl_cs *cs,474struct hl_cs_job *job, struct hl_cs_compl *cs_cmpl)475{476struct hl_gen_wait_properties wait_prop;477struct hl_sync_stream_properties *prop;478struct hl_cs_compl *signal_cs_cmpl;479u32 q_idx;480481q_idx = job->hw_queue_id;482prop = &hdev->kernel_queues[q_idx].sync_stream_prop;483484signal_cs_cmpl = container_of(cs->signal_fence,485struct hl_cs_compl,486base_fence);487488if (cs->encaps_signals) {489/* use the encaps signal handle stored earlier in the flow490* and set the SOB information from the encaps491* signals handle492*/493hl_hw_queue_encaps_sig_set_sob_info(hdev, cs, job, cs_cmpl);494495dev_dbg(hdev->dev, "Wait for encaps signals handle, qidx(%u), CS sequence(%llu), sob val: 0x%x, offset: %u\n",496cs->encaps_sig_hdl->q_idx,497cs->encaps_sig_hdl->cs_seq,498cs_cmpl->sob_val,499job->encaps_sig_wait_offset);500} else {501/* Copy the SOB id and value of the signal CS */502cs_cmpl->hw_sob = signal_cs_cmpl->hw_sob;503cs_cmpl->sob_val = signal_cs_cmpl->sob_val;504}505506/* check again if the signal cs already completed.507* if yes then don't send any wait cs since the hw_sob508* could be in reset already. if signal is not completed509* then get refcount to hw_sob to prevent resetting the sob510* while wait cs is not submitted.511* note that this check is protected by two locks,512* hw queue lock and completion object lock,513* and the same completion object lock also protects514* the hw_sob reset handler function.515* The hw_queue lock prevent out of sync of hw_sob516* refcount value, changed by signal/wait flows.517*/518spin_lock(&signal_cs_cmpl->lock);519520if (completion_done(&cs->signal_fence->completion)) {521spin_unlock(&signal_cs_cmpl->lock);522return -EINVAL;523}524525kref_get(&cs_cmpl->hw_sob->kref);526527spin_unlock(&signal_cs_cmpl->lock);528529dev_dbg(hdev->dev,530"generate wait CB, sob_id: %d, sob_val: 0x%x, mon_id: %d, q_idx: %d, seq: %llu\n",531cs_cmpl->hw_sob->sob_id, cs_cmpl->sob_val,532prop->base_mon_id, q_idx, cs->sequence);533534wait_prop.data = (void *) job->patched_cb;535wait_prop.sob_base = cs_cmpl->hw_sob->sob_id;536wait_prop.sob_mask = 0x1;537wait_prop.sob_val = cs_cmpl->sob_val;538wait_prop.mon_id = prop->base_mon_id;539wait_prop.q_idx = q_idx;540wait_prop.size = 0;541542hdev->asic_funcs->gen_wait_cb(hdev, &wait_prop);543544mb();545hl_fence_put(cs->signal_fence);546cs->signal_fence = NULL;547548return 0;549}550551/*552* init_signal_wait_cs - initialize a signal/wait CS553* @cs: pointer to the signal/wait CS554*555* H/W queues spinlock should be taken before calling this function556*/557static int init_signal_wait_cs(struct hl_cs *cs)558{559struct hl_ctx *ctx = cs->ctx;560struct hl_device *hdev = ctx->hdev;561struct hl_cs_job *job;562struct hl_cs_compl *cs_cmpl =563container_of(cs->fence, struct hl_cs_compl, base_fence);564int rc = 0;565566/* There is only one job in a signal/wait CS */567job = list_first_entry(&cs->job_list, struct hl_cs_job,568cs_node);569570if (cs->type & CS_TYPE_SIGNAL)571rc = init_signal_cs(hdev, job, cs_cmpl);572else if (cs->type & CS_TYPE_WAIT)573rc = init_wait_cs(hdev, cs, job, cs_cmpl);574575return rc;576}577578static int encaps_sig_first_staged_cs_handler579(struct hl_device *hdev, struct hl_cs *cs)580{581struct hl_cs_compl *cs_cmpl =582container_of(cs->fence,583struct hl_cs_compl, base_fence);584struct hl_cs_encaps_sig_handle *encaps_sig_hdl;585struct hl_encaps_signals_mgr *mgr;586int rc = 0;587588mgr = &cs->ctx->sig_mgr;589590spin_lock(&mgr->lock);591encaps_sig_hdl = idr_find(&mgr->handles, cs->encaps_sig_hdl_id);592if (encaps_sig_hdl) {593/*594* Set handler CS sequence,595* the CS which contains the encapsulated signals.596*/597encaps_sig_hdl->cs_seq = cs->sequence;598/* store the handle and set encaps signal indication,599* to be used later in cs_do_release to put the last600* reference to encaps signals handlers.601*/602cs_cmpl->encaps_signals = true;603cs_cmpl->encaps_sig_hdl = encaps_sig_hdl;604605/* set hw_sob pointer in completion object606* since it's used in cs_do_release flow to put607* refcount to sob608*/609cs_cmpl->hw_sob = encaps_sig_hdl->hw_sob;610cs_cmpl->sob_val = encaps_sig_hdl->pre_sob_val +611encaps_sig_hdl->count;612613dev_dbg(hdev->dev, "CS seq (%llu) added to encaps signal handler id (%u), count(%u), qidx(%u), sob(%u), val(%u)\n",614cs->sequence, encaps_sig_hdl->id,615encaps_sig_hdl->count,616encaps_sig_hdl->q_idx,617cs_cmpl->hw_sob->sob_id,618cs_cmpl->sob_val);619620} else {621dev_err(hdev->dev, "encaps handle id(%u) wasn't found!\n",622cs->encaps_sig_hdl_id);623rc = -EINVAL;624}625626spin_unlock(&mgr->lock);627628return rc;629}630631/*632* hl_hw_queue_schedule_cs - schedule a command submission633* @cs: pointer to the CS634*/635int hl_hw_queue_schedule_cs(struct hl_cs *cs)636{637enum hl_device_status status;638struct hl_cs_counters_atomic *cntr;639struct hl_ctx *ctx = cs->ctx;640struct hl_device *hdev = ctx->hdev;641struct hl_cs_job *job, *tmp;642struct hl_hw_queue *q;643int rc = 0, i, cq_cnt;644bool first_entry;645u32 max_queues;646647cntr = &hdev->aggregated_cs_counters;648649hdev->asic_funcs->hw_queues_lock(hdev);650651if (!hl_device_operational(hdev, &status)) {652atomic64_inc(&cntr->device_in_reset_drop_cnt);653atomic64_inc(&ctx->cs_counters.device_in_reset_drop_cnt);654dev_err(hdev->dev,655"device is %s, CS rejected!\n", hdev->status[status]);656rc = -EPERM;657goto out;658}659660max_queues = hdev->asic_prop.max_queues;661662q = &hdev->kernel_queues[0];663for (i = 0, cq_cnt = 0 ; i < max_queues ; i++, q++) {664if (cs->jobs_in_queue_cnt[i]) {665switch (q->queue_type) {666case QUEUE_TYPE_EXT:667rc = ext_queue_sanity_checks(hdev, q,668cs->jobs_in_queue_cnt[i],669cs_needs_completion(cs) ?670true : false);671break;672case QUEUE_TYPE_INT:673rc = int_queue_sanity_checks(hdev, q,674cs->jobs_in_queue_cnt[i]);675break;676case QUEUE_TYPE_HW:677rc = hw_queue_sanity_checks(hdev, q,678cs->jobs_in_queue_cnt[i]);679break;680default:681dev_err(hdev->dev, "Queue type %d is invalid\n",682q->queue_type);683rc = -EINVAL;684break;685}686687if (rc) {688atomic64_inc(689&ctx->cs_counters.queue_full_drop_cnt);690atomic64_inc(&cntr->queue_full_drop_cnt);691goto unroll_cq_resv;692}693694if (q->queue_type == QUEUE_TYPE_EXT)695cq_cnt++;696}697}698699if ((cs->type == CS_TYPE_SIGNAL) || (cs->type == CS_TYPE_WAIT)) {700rc = init_signal_wait_cs(cs);701if (rc)702goto unroll_cq_resv;703} else if (cs->type == CS_TYPE_COLLECTIVE_WAIT) {704rc = hdev->asic_funcs->collective_wait_init_cs(cs);705if (rc)706goto unroll_cq_resv;707}708709rc = hdev->asic_funcs->pre_schedule_cs(cs);710if (rc) {711dev_err(hdev->dev,712"Failed in pre-submission operations of CS %d.%llu\n",713ctx->asid, cs->sequence);714goto unroll_cq_resv;715}716717hdev->shadow_cs_queue[cs->sequence &718(hdev->asic_prop.max_pending_cs - 1)] = cs;719720if (cs->encaps_signals && cs->staged_first) {721rc = encaps_sig_first_staged_cs_handler(hdev, cs);722if (rc)723goto unroll_cq_resv;724}725726spin_lock(&hdev->cs_mirror_lock);727728/* Verify staged CS exists and add to the staged list */729if (cs->staged_cs && !cs->staged_first) {730struct hl_cs *staged_cs;731732staged_cs = hl_staged_cs_find_first(hdev, cs->staged_sequence);733if (!staged_cs) {734dev_err(hdev->dev,735"Cannot find staged submission sequence %llu",736cs->staged_sequence);737rc = -EINVAL;738goto unlock_cs_mirror;739}740741if (is_staged_cs_last_exists(hdev, staged_cs)) {742dev_err(hdev->dev,743"Staged submission sequence %llu already submitted",744cs->staged_sequence);745rc = -EINVAL;746goto unlock_cs_mirror;747}748749list_add_tail(&cs->staged_cs_node, &staged_cs->staged_cs_node);750751/* update stream map of the first CS */752if (hdev->supports_wait_for_multi_cs)753staged_cs->fence->stream_master_qid_map |=754cs->fence->stream_master_qid_map;755}756757list_add_tail(&cs->mirror_node, &hdev->cs_mirror_list);758759/* Queue TDR if the CS is the first entry and if timeout is wanted */760first_entry = list_first_entry(&hdev->cs_mirror_list,761struct hl_cs, mirror_node) == cs;762if ((hdev->timeout_jiffies != MAX_SCHEDULE_TIMEOUT) &&763first_entry && cs_needs_timeout(cs)) {764cs->tdr_active = true;765schedule_delayed_work(&cs->work_tdr, cs->timeout_jiffies);766767}768769spin_unlock(&hdev->cs_mirror_lock);770771list_for_each_entry_safe(job, tmp, &cs->job_list, cs_node)772switch (job->queue_type) {773case QUEUE_TYPE_EXT:774ext_queue_schedule_job(job);775break;776case QUEUE_TYPE_INT:777int_queue_schedule_job(job);778break;779case QUEUE_TYPE_HW:780hw_queue_schedule_job(job);781break;782default:783break;784}785786cs->submitted = true;787788goto out;789790unlock_cs_mirror:791spin_unlock(&hdev->cs_mirror_lock);792unroll_cq_resv:793q = &hdev->kernel_queues[0];794for (i = 0 ; (i < max_queues) && (cq_cnt > 0) ; i++, q++) {795if ((q->queue_type == QUEUE_TYPE_EXT) &&796(cs->jobs_in_queue_cnt[i])) {797atomic_t *free_slots =798&hdev->completion_queue[i].free_slots_cnt;799atomic_add(cs->jobs_in_queue_cnt[i], free_slots);800cq_cnt--;801}802}803804out:805hdev->asic_funcs->hw_queues_unlock(hdev);806807return rc;808}809810/*811* hl_hw_queue_inc_ci_kernel - increment ci for kernel's queue812*813* @hdev: pointer to hl_device structure814* @hw_queue_id: which queue to increment its ci815*/816void hl_hw_queue_inc_ci_kernel(struct hl_device *hdev, u32 hw_queue_id)817{818struct hl_hw_queue *q = &hdev->kernel_queues[hw_queue_id];819820atomic_inc(&q->ci);821}822823static int ext_and_cpu_queue_init(struct hl_device *hdev, struct hl_hw_queue *q,824bool is_cpu_queue)825{826void *p;827int rc;828829if (is_cpu_queue)830p = hl_cpu_accessible_dma_pool_alloc(hdev, HL_QUEUE_SIZE_IN_BYTES, &q->bus_address);831else832p = hl_asic_dma_alloc_coherent(hdev, HL_QUEUE_SIZE_IN_BYTES, &q->bus_address,833GFP_KERNEL | __GFP_ZERO);834if (!p)835return -ENOMEM;836837q->kernel_address = p;838839q->shadow_queue = kmalloc_array(HL_QUEUE_LENGTH, sizeof(struct hl_cs_job *), GFP_KERNEL);840if (!q->shadow_queue) {841dev_err(hdev->dev,842"Failed to allocate shadow queue for H/W queue %d\n",843q->hw_queue_id);844rc = -ENOMEM;845goto free_queue;846}847848/* Make sure read/write pointers are initialized to start of queue */849atomic_set(&q->ci, 0);850q->pi = 0;851852return 0;853854free_queue:855if (is_cpu_queue)856hl_cpu_accessible_dma_pool_free(hdev, HL_QUEUE_SIZE_IN_BYTES, q->kernel_address);857else858hl_asic_dma_free_coherent(hdev, HL_QUEUE_SIZE_IN_BYTES, q->kernel_address,859q->bus_address);860861return rc;862}863864static int int_queue_init(struct hl_device *hdev, struct hl_hw_queue *q)865{866void *p;867868p = hdev->asic_funcs->get_int_queue_base(hdev, q->hw_queue_id,869&q->bus_address, &q->int_queue_len);870if (!p) {871dev_err(hdev->dev,872"Failed to get base address for internal queue %d\n",873q->hw_queue_id);874return -EFAULT;875}876877q->kernel_address = p;878q->pi = 0;879atomic_set(&q->ci, 0);880881return 0;882}883884static int cpu_queue_init(struct hl_device *hdev, struct hl_hw_queue *q)885{886return ext_and_cpu_queue_init(hdev, q, true);887}888889static int ext_queue_init(struct hl_device *hdev, struct hl_hw_queue *q)890{891return ext_and_cpu_queue_init(hdev, q, false);892}893894static int hw_queue_init(struct hl_device *hdev, struct hl_hw_queue *q)895{896void *p;897898p = hl_asic_dma_alloc_coherent(hdev, HL_QUEUE_SIZE_IN_BYTES, &q->bus_address,899GFP_KERNEL | __GFP_ZERO);900if (!p)901return -ENOMEM;902903q->kernel_address = p;904905/* Make sure read/write pointers are initialized to start of queue */906atomic_set(&q->ci, 0);907q->pi = 0;908909return 0;910}911912static void sync_stream_queue_init(struct hl_device *hdev, u32 q_idx)913{914struct hl_sync_stream_properties *sync_stream_prop;915struct asic_fixed_properties *prop = &hdev->asic_prop;916struct hl_hw_sob *hw_sob;917int sob, reserved_mon_idx, queue_idx;918919sync_stream_prop = &hdev->kernel_queues[q_idx].sync_stream_prop;920921/* We use 'collective_mon_idx' as a running index in order to reserve922* monitors for collective master/slave queues.923* collective master queue gets 2 reserved monitors924* collective slave queue gets 1 reserved monitor925*/926if (hdev->kernel_queues[q_idx].collective_mode ==927HL_COLLECTIVE_MASTER) {928reserved_mon_idx = hdev->collective_mon_idx;929930/* reserve the first monitor for collective master queue */931sync_stream_prop->collective_mstr_mon_id[0] =932prop->collective_first_mon + reserved_mon_idx;933934/* reserve the second monitor for collective master queue */935sync_stream_prop->collective_mstr_mon_id[1] =936prop->collective_first_mon + reserved_mon_idx + 1;937938hdev->collective_mon_idx += HL_COLLECTIVE_RSVD_MSTR_MONS;939} else if (hdev->kernel_queues[q_idx].collective_mode ==940HL_COLLECTIVE_SLAVE) {941reserved_mon_idx = hdev->collective_mon_idx++;942943/* reserve a monitor for collective slave queue */944sync_stream_prop->collective_slave_mon_id =945prop->collective_first_mon + reserved_mon_idx;946}947948if (!hdev->kernel_queues[q_idx].supports_sync_stream)949return;950951queue_idx = hdev->sync_stream_queue_idx++;952953sync_stream_prop->base_sob_id = prop->sync_stream_first_sob +954(queue_idx * HL_RSVD_SOBS);955sync_stream_prop->base_mon_id = prop->sync_stream_first_mon +956(queue_idx * HL_RSVD_MONS);957sync_stream_prop->next_sob_val = 1;958sync_stream_prop->curr_sob_offset = 0;959960for (sob = 0 ; sob < HL_RSVD_SOBS ; sob++) {961hw_sob = &sync_stream_prop->hw_sob[sob];962hw_sob->hdev = hdev;963hw_sob->sob_id = sync_stream_prop->base_sob_id + sob;964hw_sob->sob_addr =965hdev->asic_funcs->get_sob_addr(hdev, hw_sob->sob_id);966hw_sob->q_idx = q_idx;967kref_init(&hw_sob->kref);968}969}970971static void sync_stream_queue_reset(struct hl_device *hdev, u32 q_idx)972{973struct hl_sync_stream_properties *prop =974&hdev->kernel_queues[q_idx].sync_stream_prop;975976/*977* In case we got here due to a stuck CS, the refcnt might be bigger978* than 1 and therefore we reset it.979*/980kref_init(&prop->hw_sob[prop->curr_sob_offset].kref);981prop->curr_sob_offset = 0;982prop->next_sob_val = 1;983}984985/*986* queue_init - main initialization function for H/W queue object987*988* @hdev: pointer to hl_device device structure989* @q: pointer to hl_hw_queue queue structure990* @hw_queue_id: The id of the H/W queue991*992* Allocate dma-able memory for the queue and initialize fields993* Returns 0 on success994*/995static int queue_init(struct hl_device *hdev, struct hl_hw_queue *q,996u32 hw_queue_id)997{998int rc;9991000q->hw_queue_id = hw_queue_id;10011002switch (q->queue_type) {1003case QUEUE_TYPE_EXT:1004rc = ext_queue_init(hdev, q);1005break;1006case QUEUE_TYPE_INT:1007rc = int_queue_init(hdev, q);1008break;1009case QUEUE_TYPE_CPU:1010rc = cpu_queue_init(hdev, q);1011break;1012case QUEUE_TYPE_HW:1013rc = hw_queue_init(hdev, q);1014break;1015case QUEUE_TYPE_NA:1016q->valid = 0;1017return 0;1018default:1019dev_crit(hdev->dev, "wrong queue type %d during init\n",1020q->queue_type);1021rc = -EINVAL;1022break;1023}10241025sync_stream_queue_init(hdev, q->hw_queue_id);10261027if (rc)1028return rc;10291030q->valid = 1;10311032return 0;1033}10341035/*1036* hw_queue_fini - destroy queue1037*1038* @hdev: pointer to hl_device device structure1039* @q: pointer to hl_hw_queue queue structure1040*1041* Free the queue memory1042*/1043static void queue_fini(struct hl_device *hdev, struct hl_hw_queue *q)1044{1045if (!q->valid)1046return;10471048/*1049* If we arrived here, there are no jobs waiting on this queue1050* so we can safely remove it.1051* This is because this function can only called when:1052* 1. Either a context is deleted, which only can occur if all its1053* jobs were finished1054* 2. A context wasn't able to be created due to failure or timeout,1055* which means there are no jobs on the queue yet1056*1057* The only exception are the queues of the kernel context, but1058* if they are being destroyed, it means that the entire module is1059* being removed. If the module is removed, it means there is no open1060* user context. It also means that if a job was submitted by1061* the kernel driver (e.g. context creation), the job itself was1062* released by the kernel driver when a timeout occurred on its1063* Completion. Thus, we don't need to release it again.1064*/10651066if (q->queue_type == QUEUE_TYPE_INT)1067return;10681069kfree(q->shadow_queue);10701071if (q->queue_type == QUEUE_TYPE_CPU)1072hl_cpu_accessible_dma_pool_free(hdev, HL_QUEUE_SIZE_IN_BYTES, q->kernel_address);1073else1074hl_asic_dma_free_coherent(hdev, HL_QUEUE_SIZE_IN_BYTES, q->kernel_address,1075q->bus_address);1076}10771078int hl_hw_queues_create(struct hl_device *hdev)1079{1080struct asic_fixed_properties *asic = &hdev->asic_prop;1081struct hl_hw_queue *q;1082int i, rc, q_ready_cnt;10831084hdev->kernel_queues = kcalloc(asic->max_queues,1085sizeof(*hdev->kernel_queues), GFP_KERNEL);10861087if (!hdev->kernel_queues) {1088dev_err(hdev->dev, "Not enough memory for H/W queues\n");1089return -ENOMEM;1090}10911092/* Initialize the H/W queues */1093for (i = 0, q_ready_cnt = 0, q = hdev->kernel_queues;1094i < asic->max_queues ; i++, q_ready_cnt++, q++) {10951096q->queue_type = asic->hw_queues_props[i].type;1097q->supports_sync_stream =1098asic->hw_queues_props[i].supports_sync_stream;1099q->collective_mode = asic->hw_queues_props[i].collective_mode;1100q->dram_bd = asic->hw_queues_props[i].dram_bd;11011102rc = queue_init(hdev, q, i);1103if (rc) {1104dev_err(hdev->dev,1105"failed to initialize queue %d\n", i);1106goto release_queues;1107}11081109/* Set DRAM PQ address for the queue if it should be at DRAM */1110if (q->dram_bd)1111q->pq_dram_address = asic->hw_queues_props[i].q_dram_bd_address;1112}11131114return 0;11151116release_queues:1117for (i = 0, q = hdev->kernel_queues ; i < q_ready_cnt ; i++, q++)1118queue_fini(hdev, q);11191120kfree(hdev->kernel_queues);11211122return rc;1123}11241125void hl_hw_queues_destroy(struct hl_device *hdev)1126{1127struct hl_hw_queue *q;1128u32 max_queues = hdev->asic_prop.max_queues;1129int i;11301131for (i = 0, q = hdev->kernel_queues ; i < max_queues ; i++, q++)1132queue_fini(hdev, q);11331134kfree(hdev->kernel_queues);1135}11361137void hl_hw_queue_reset(struct hl_device *hdev, bool hard_reset)1138{1139struct hl_hw_queue *q;1140u32 max_queues = hdev->asic_prop.max_queues;1141int i;11421143for (i = 0, q = hdev->kernel_queues ; i < max_queues ; i++, q++) {1144if ((!q->valid) ||1145((!hard_reset) && (q->queue_type == QUEUE_TYPE_CPU)))1146continue;1147q->pi = 0;1148atomic_set(&q->ci, 0);11491150if (q->supports_sync_stream)1151sync_stream_queue_reset(hdev, q->hw_queue_id);1152}1153}115411551156